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src/northbridge: Remove whitespace after sizeof 

Change-Id: Iea0352f85f4d5f47fc906edbe625e7bbf3f03afd
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16863
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins)
This commit is contained in:
Elyes HAOUAS 2016-10-03 21:57:21 +02:00 committed by Kyösti Mälkki
parent 18cd8a64a4
commit 0d4b11a4f8
18 changed files with 37 additions and 37 deletions
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2
src/northbridge/amd/agesa/family10/northbridge.c
View File

@ -482,7 +482,7 @@ static void amdfam10_set_resource(device_t dev, struct resource *resource,
store_conf_mmio_addr(nodeid, link_num, reg, (resource->index >>24), rbase>>8, rend>>8);
}
resource->flags |= IORESOURCE_STORED;
snprintf(buf, sizeof (buf), " <node %x link %x>",
snprintf(buf, sizeof(buf), " <node %x link %x>",
nodeid, link_num);
report_resource_stored(dev, resource, buf);
}

2
src/northbridge/amd/agesa/family12/northbridge.c
View File

@ -373,7 +373,7 @@ static void set_resource(device_t dev, struct resource *resource, u32 nodeid)
set_mmio_addr_reg(nodeid, link_num, reg, (resource->index >>24), rbase>>8, rend>>8, 1); // [39:8]
}
resource->flags |= IORESOURCE_STORED;
snprintf(buf, sizeof (buf), " <node %x link %x>", nodeid, link_num);
snprintf(buf, sizeof(buf), " <node %x link %x>", nodeid, link_num);
report_resource_stored(dev, resource, buf);
printk(BIOS_DEBUG, "Fam12h - northbridge.c - %s - End.\n",__func__);
}

2
src/northbridge/amd/agesa/family14/northbridge.c
View File

@ -382,7 +382,7 @@ static void set_resource(device_t dev, struct resource *resource, u32 nodeid)
rbase >> 8, rend >> 8, 1); // [39:8]
}
resource->flags |= IORESOURCE_STORED;
snprintf(buf, sizeof (buf), " <node %x link %x>", nodeid, link_num);
snprintf(buf, sizeof(buf), " <node %x link %x>", nodeid, link_num);
report_resource_stored(dev, resource, buf);
}

2
src/northbridge/amd/agesa/family15/northbridge.c
View File

@ -387,7 +387,7 @@ static void set_resource(device_t dev, struct resource *resource, u32 nodeid)
set_mmio_addr_reg(nodeid, link_num, reg, (resource->index >>24), rbase>>8, rend>>8, node_nums);// [39:8]
}
resource->flags |= IORESOURCE_STORED;
snprintf(buf, sizeof (buf), " <node %x link %x>",
snprintf(buf, sizeof(buf), " <node %x link %x>",
nodeid, link_num);
report_resource_stored(dev, resource, buf);
}

2
src/northbridge/amd/agesa/family15rl/northbridge.c
View File

@ -387,7 +387,7 @@ static void set_resource(struct device *dev, struct resource *resource, u32 node
set_mmio_addr_reg(nodeid, link_num, reg, (resource->index >>24), rbase>>8, rend>>8, node_nums);// [39:8]
}
resource->flags |= IORESOURCE_STORED;
snprintf(buf, sizeof (buf), " <node %x link %x>",
snprintf(buf, sizeof(buf), " <node %x link %x>",
nodeid, link_num);
report_resource_stored(dev, resource, buf);
}

2
src/northbridge/amd/agesa/family15tn/northbridge.c
View File

@ -386,7 +386,7 @@ static void set_resource(device_t dev, struct resource *resource, u32 nodeid)
set_mmio_addr_reg(nodeid, link_num, reg, (resource->index >>24), rbase>>8, rend>>8, node_nums);// [39:8]
}
resource->flags |= IORESOURCE_STORED;
snprintf(buf, sizeof (buf), " <node %x link %x>",
snprintf(buf, sizeof(buf), " <node %x link %x>",
nodeid, link_num);
report_resource_stored(dev, resource, buf);
}

2
src/northbridge/amd/agesa/family16kb/northbridge.c
View File

@ -386,7 +386,7 @@ static void set_resource(device_t dev, struct resource *resource, u32 nodeid)
set_mmio_addr_reg(nodeid, link_num, reg, (resource->index >>24), rbase>>8, rend>>8, node_nums);// [39:8]
}
resource->flags |= IORESOURCE_STORED;
snprintf(buf, sizeof (buf), " <node %x link %x>",
snprintf(buf, sizeof(buf), " <node %x link %x>",
nodeid, link_num);
report_resource_stored(dev, resource, buf);
}

8
src/northbridge/amd/amdfam10/northbridge.c
View File

@ -581,7 +581,7 @@ static void amdfam10_set_resource(device_t dev, struct resource *resource,
store_conf_mmio_addr(nodeid, link_num, reg, (resource->index >>24), rbase>>8, rend>>8);
}
resource->flags |= IORESOURCE_STORED;
snprintf(buf, sizeof (buf), " <node %x link %x>",
snprintf(buf, sizeof(buf), " <node %x link %x>",
nodeid, link_num);
report_resource_stored(dev, resource, buf);
}
@ -1239,10 +1239,10 @@ static int amdfam10_get_smbios_data17(int* count, int handle, int parent_handle,
t->attributes |= ranks & 0xf; /* rank number is stored in the lowest 4 bits of the attributes field */
t->form_factor = MEMORY_FORMFACTOR_DIMM;
if (mem_info->dct_stat[node].Dual_Node_Package) {
snprintf(string_buffer, sizeof (string_buffer), "NODE %d DIMM_%s%d", node >> 1,
snprintf(string_buffer, sizeof(string_buffer), "NODE %d DIMM_%s%d", node >> 1,
(mem_info->dct_stat[node].Internal_Node_ID)?((slot & 0x1)?"D":"C"):((slot & 0x1)?"B":"A"), (slot >> 1) + 1);
} else {
snprintf(string_buffer, sizeof (string_buffer), "NODE %d DIMM_%s%d", node, (slot & 0x1)?"B":"A", (slot >> 1) + 1);
snprintf(string_buffer, sizeof(string_buffer), "NODE %d DIMM_%s%d", node, (slot & 0x1)?"B":"A", (slot >> 1) + 1);
}
t->device_locator = smbios_add_string(t->eos, string_buffer);
if (IS_ENABLED(CONFIG_DIMM_DDR2))
@ -1261,7 +1261,7 @@ static int amdfam10_get_smbios_data17(int* count, int handle, int parent_handle,
if (mem_info->dct_stat[node].DimmSerialNumber[slot] == 0) {
t->serial_number = smbios_add_string(t->eos, "None");
} else {
snprintf(string_buffer, sizeof (string_buffer), "%08X", mem_info->dct_stat[node].DimmSerialNumber[slot]);
snprintf(string_buffer, sizeof(string_buffer), "%08X", mem_info->dct_stat[node].DimmSerialNumber[slot]);
t->serial_number = smbios_add_string(t->eos, string_buffer);
}
if (IS_ENABLED(CONFIG_DIMM_DDR2)) {

2
src/northbridge/amd/amdk8/northbridge.c
View File

@ -470,7 +470,7 @@ static void amdk8_set_resource(device_t dev, struct resource *resource, unsigned
f1_write_config32(reg, base);
}
resource->flags |= IORESOURCE_STORED;
snprintf(buf, sizeof (buf), " <node %x link %x>",
snprintf(buf, sizeof(buf), " <node %x link %x>",
nodeid, link_num);
report_resource_stored(dev, resource, buf);
}

2
src/northbridge/amd/pi/00630F01/dimmSpd.c
View File

@ -24,7 +24,7 @@
#include "northbridge/amd/pi/dimmSpd.h"
#define DIMENSION(array)(sizeof (array)/ sizeof (array [0]))
#define DIMENSION(array)(sizeof(array)/ sizeof(array [0]))
AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PARAMS *info)
{

2
src/northbridge/amd/pi/00630F01/northbridge.c
View File

@ -380,7 +380,7 @@ static void set_resource(device_t dev, struct resource *resource, u32 nodeid)
set_mmio_addr_reg(nodeid, link_num, reg, (resource->index >>24), rbase>>8, rend>>8, node_nums) ;// [39:8]
}
resource->flags |= IORESOURCE_STORED;
snprintf(buf, sizeof (buf), " <node %x link %x>",
snprintf(buf, sizeof(buf), " <node %x link %x>",
nodeid, link_num);
report_resource_stored(dev, resource, buf);
}

2
src/northbridge/amd/pi/00730F01/dimmSpd.c
View File

@ -24,7 +24,7 @@
#include "northbridge/amd/pi/dimmSpd.h"
#define DIMENSION(array)(sizeof (array)/ sizeof (array [0]))
#define DIMENSION(array)(sizeof(array)/ sizeof(array [0]))
AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PARAMS *info)
{

2
src/northbridge/amd/pi/00730F01/northbridge.c
View File

@ -394,7 +394,7 @@ static void set_resource(device_t dev, struct resource *resource, u32 nodeid)
set_mmio_addr_reg(nodeid, link_num, reg, (resource->index >>24), rbase>>8, rend>>8, node_nums) ;// [39:8]
}
resource->flags |= IORESOURCE_STORED;
snprintf(buf, sizeof (buf), " <node %x link %x>",
snprintf(buf, sizeof(buf), " <node %x link %x>",
nodeid, link_num);
report_resource_stored(dev, resource, buf);
}

30
src/northbridge/amd/pi/agesawrapper.c
View File

@ -52,12 +52,12 @@ AGESA_STATUS agesawrapper_amdinitreset(void)
LibAmdMemFill (&AmdParamStruct,
0,
sizeof (AMD_INTERFACE_PARAMS),
sizeof(AMD_INTERFACE_PARAMS),
&(AmdParamStruct.StdHeader));
LibAmdMemFill (&AmdResetParams,
0,
sizeof (AMD_RESET_PARAMS),
sizeof(AMD_RESET_PARAMS),
&(AmdResetParams.StdHeader));
AmdParamStruct.AgesaFunctionName = AMD_INIT_RESET;
@ -91,7 +91,7 @@ AGESA_STATUS agesawrapper_amdinitearly(void)
LibAmdMemFill (&AmdParamStruct,
0,
sizeof (AMD_INTERFACE_PARAMS),
sizeof(AMD_INTERFACE_PARAMS),
&(AmdParamStruct.StdHeader));
AmdParamStruct.AgesaFunctionName = AMD_INIT_EARLY;
@ -121,7 +121,7 @@ AGESA_STATUS agesawrapper_amdinitpost(void)
LibAmdMemFill (&AmdParamStruct,
0,
sizeof (AMD_INTERFACE_PARAMS),
sizeof(AMD_INTERFACE_PARAMS),
&(AmdParamStruct.StdHeader));
AmdParamStruct.AgesaFunctionName = AMD_INIT_POST;
@ -179,7 +179,7 @@ AGESA_STATUS agesawrapper_amdinitenv(void)
LibAmdMemFill (&AmdParamStruct,
0,
sizeof (AMD_INTERFACE_PARAMS),
sizeof(AMD_INTERFACE_PARAMS),
&(AmdParamStruct.StdHeader));
AmdParamStruct.AgesaFunctionName = AMD_INIT_ENV;
@ -247,7 +247,7 @@ AGESA_STATUS agesawrapper_amdinitmid(void)
LibAmdMemFill (&AmdParamStruct,
0,
sizeof (AMD_INTERFACE_PARAMS),
sizeof(AMD_INTERFACE_PARAMS),
&(AmdParamStruct.StdHeader));
AmdParamStruct.AgesaFunctionName = AMD_INIT_MID;
@ -285,7 +285,7 @@ AGESA_STATUS agesawrapper_amdinitlate(void)
LibAmdMemFill (&AmdParamStruct,
0,
sizeof (AMD_INTERFACE_PARAMS),
sizeof(AMD_INTERFACE_PARAMS),
&(AmdParamStruct.StdHeader));
AmdParamStruct.AgesaFunctionName = AMD_INIT_LATE;
@ -341,7 +341,7 @@ AGESA_STATUS agesawrapper_amdlaterunaptask (
LibAmdMemFill (&ApExeParams,
0,
sizeof (AP_EXE_PARAMS),
sizeof(AP_EXE_PARAMS),
&(ApExeParams.StdHeader));
ApExeParams.StdHeader.AltImageBasePtr = 0;
@ -371,7 +371,7 @@ AGESA_STATUS agesawrapper_amdinitresume(void)
LibAmdMemFill (&AmdParamStruct,
0,
sizeof (AMD_INTERFACE_PARAMS),
sizeof(AMD_INTERFACE_PARAMS),
&(AmdParamStruct.StdHeader));
AmdParamStruct.AgesaFunctionName = AMD_INIT_RESUME;
@ -416,7 +416,7 @@ AGESA_STATUS agesawrapper_fchs3earlyrestore(void)
LibAmdMemFill (&FchParams,
0,
sizeof (FchParams),
sizeof(FchParams),
&StdHeader);
FchParams.StdHeader = &StdHeader;
@ -439,7 +439,7 @@ AGESA_STATUS agesawrapper_amds3laterestore(void)
agesawrapper_amdinitcpuio();
LibAmdMemFill (&AmdS3LateParams,
0,
sizeof (AMD_S3LATE_PARAMS),
sizeof(AMD_S3LATE_PARAMS),
&(AmdS3LateParams.StdHeader));
AmdInterfaceParams.StdHeader.ImageBasePtr = 0;
AmdInterfaceParams.AllocationMethod = ByHost;
@ -447,7 +447,7 @@ AGESA_STATUS agesawrapper_amds3laterestore(void)
AmdInterfaceParams.NewStructPtr = &AmdS3LateParams;
AmdInterfaceParams.StdHeader.CalloutPtr = &GetBiosCallout;
AmdS3LateParamsPtr = &AmdS3LateParams;
AmdInterfaceParams.NewStructSize = sizeof (AMD_S3LATE_PARAMS);
AmdInterfaceParams.NewStructSize = sizeof(AMD_S3LATE_PARAMS);
AmdCreateStruct (&AmdInterfaceParams);
@ -485,7 +485,7 @@ AGESA_STATUS agesawrapper_fchs3laterestore(void)
LibAmdMemFill (&FchParams,
0,
sizeof (FchParams),
sizeof(FchParams),
&StdHeader);
FchParams.StdHeader = &StdHeader;
@ -516,7 +516,7 @@ AGESA_STATUS agesawrapper_amdS3Save(void)
LibAmdMemFill (&AmdInterfaceParams,
0,
sizeof (AMD_INTERFACE_PARAMS),
sizeof(AMD_INTERFACE_PARAMS),
&(AmdInterfaceParams.StdHeader));
AmdInterfaceParams.StdHeader.ImageBasePtr = 0;
@ -576,7 +576,7 @@ AGESA_STATUS agesawrapper_amdreadeventlog (UINT8 HeapStatus)
LibAmdMemFill (&AmdEventParams,
0,
sizeof (EVENT_PARAMS),
sizeof(EVENT_PARAMS),
&(AmdEventParams.StdHeader));
AmdEventParams.StdHeader.AltImageBasePtr = 0;

2
src/northbridge/intel/fsp_sandybridge/acpi.c
View File

@ -201,7 +201,7 @@ void *igd_make_opregion(void)
igd_opregion_t *opregion;
printk(BIOS_DEBUG, "ACPI: * IGD OpRegion\n");
opregion = cbmem_add(CBMEM_ID_IGD_OPREGION, sizeof (*opregion));
opregion = cbmem_add(CBMEM_ID_IGD_OPREGION, sizeof(*opregion));
if (opregion)
init_igd_opregion(opregion);
return opregion;

2
src/northbridge/intel/nehalem/acpi.c
View File

@ -200,7 +200,7 @@ void *igd_make_opregion(void)
igd_opregion_t *opregion;
printk(BIOS_DEBUG, "ACPI: * IGD OpRegion\n");
opregion = cbmem_add(CBMEM_ID_IGD_OPREGION, sizeof (*opregion));
opregion = cbmem_add(CBMEM_ID_IGD_OPREGION, sizeof(*opregion));
if (opregion)
init_igd_opregion(opregion);
return opregion;

2
src/northbridge/intel/sandybridge/acpi.c
View File

@ -203,7 +203,7 @@ void *igd_make_opregion(void)
igd_opregion_t *opregion;
printk(BIOS_DEBUG, "ACPI: * IGD OpRegion\n");
opregion = cbmem_add(CBMEM_ID_IGD_OPREGION, sizeof (*opregion));
opregion = cbmem_add(CBMEM_ID_IGD_OPREGION, sizeof(*opregion));
if (opregion)
init_igd_opregion(opregion);
return opregion;

6
src/northbridge/intel/sandybridge/raminit.c
View File

@ -370,7 +370,7 @@ static void dram_find_spds_ddr3(spd_raw_data *spd, ramctr_timing *ctrl)
int channel, slot, spd_slot;
dimm_info *dimm = &ctrl->info;
memset (ctrl->rankmap, 0, sizeof (ctrl->rankmap));
memset (ctrl->rankmap, 0, sizeof(ctrl->rankmap));
ctrl->extended_temperature_range = 1;
ctrl->auto_self_refresh = 1;
@ -4200,7 +4200,7 @@ void init_dram_ddr3(spd_raw_data *spds, int mobile, int min_tck,
halt();
}
memset(&ctrl, 0, sizeof (ctrl));
memset(&ctrl, 0, sizeof(ctrl));
early_pch_init_native();
early_thermal_init();
@ -4415,7 +4415,7 @@ void perform_raminit(int s3resume)
post_code(0x3a);
memset (spd, 0, sizeof (spd));
memset (spd, 0, sizeof(spd));
mainboard_get_spd(spd);
timestamp_add_now(TS_BEFORE_INITRAM);