From 0d6972fcb23a8067e2e182459dda4f639461234c Mon Sep 17 00:00:00 2001 From: Raul E Rangel Date: Thu, 3 Feb 2022 15:21:04 -0700 Subject: [PATCH] vc/amd/cezanne: Add support to map UARTs This will allow coreboot to directly write to the UART controller. BUG=b:215599230 TEST=Try mapping the uart on guybrush Signed-off-by: Raul E Rangel Change-Id: Ibd346cec2994e612f2901bb91d572982ce2ed5e7 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61606 Tested-by: build bot (Jenkins) Reviewed-by: Rob Barnes --- .../amd/fsp/cezanne/include/bl_uapp/bl_syscall_public.h | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/src/vendorcode/amd/fsp/cezanne/include/bl_uapp/bl_syscall_public.h b/src/vendorcode/amd/fsp/cezanne/include/bl_uapp/bl_syscall_public.h index 4cf9e70686..d88bfe1801 100644 --- a/src/vendorcode/amd/fsp/cezanne/include/bl_uapp/bl_syscall_public.h +++ b/src/vendorcode/amd/fsp/cezanne/include/bl_uapp/bl_syscall_public.h @@ -88,10 +88,17 @@ enum fch_io_device { FCH_IO_DEVICE_MISC, FCH_IO_DEVICE_AOAC, FCH_IO_DEVICE_IOPORT, + FCH_IO_DEVICE_UART, FCH_IO_DEVICE_END, }; +enum fch_uart_id { + FCH_UART_ID_0 = 0, + FCH_UART_ID_1 = 1, + FCH_UART_ID_MAX, +}; + enum fch_i2c_controller_id { FCH_I2C_CONTROLLER_ID_0 = 0, FCH_I2C_CONTROLLER_ID_1 = 1,