mb/google/poppy/variants/rammus: change build directory to rammus

Move the build board directory from poppy to rammus.

BUG=b:111579386
BRANCH=Master
TEST=Build pass

Change-Id: I3a9fc2bbfe7261661f0c5c073baff0ff1434d09f
Signed-off-by: Zhuohao Lee <zhuohao@chromium.org>
Reviewed-on: https://review.coreboot.org/27804
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Zhuohao Lee 2018-08-02 23:29:22 +08:00 committed by Patrick Georgi
parent 9ea7762e79
commit 0d8d4c642a
6 changed files with 131 additions and 2 deletions

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@ -129,7 +129,7 @@ config VARIANT_DIR
default "nami" if BOARD_GOOGLE_NAMI default "nami" if BOARD_GOOGLE_NAMI
default "nautilus" if BOARD_GOOGLE_NAUTILUS default "nautilus" if BOARD_GOOGLE_NAUTILUS
default "nocturne" if BOARD_GOOGLE_NOCTURNE default "nocturne" if BOARD_GOOGLE_NOCTURNE
default "poppy" if BOARD_GOOGLE_RAMMUS default "rammus" if BOARD_GOOGLE_RAMMUS
default "soraka" if BOARD_GOOGLE_SORAKA default "soraka" if BOARD_GOOGLE_SORAKA
# Select this option to enable camera ACPI support on the variant. # Select this option to enable camera ACPI support on the variant.
@ -183,6 +183,11 @@ config VARIANT_SPECIFIC_OPTIONS_NOCTURNE
select VARIANT_HAS_CAMERA_ACPI select VARIANT_HAS_CAMERA_ACPI
select GEO_SAR_ENABLE if CHROMEOS_WIFI_SAR select GEO_SAR_ENABLE if CHROMEOS_WIFI_SAR
config VARIANT_SPECIFIC_OPTIONS_RAMMUS
def_bool n
select CHROMEOS_WIFI_SAR if CHROMEOS
select MAINBOARD_HAS_SPI_TPM_CR50
config VARIANT_SPECIFIC_OPTIONS_SORAKA config VARIANT_SPECIFIC_OPTIONS_SORAKA
def_bool n def_bool n
select DRIVERS_I2C_MAX98927 select DRIVERS_I2C_MAX98927

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@ -28,7 +28,7 @@ config BOARD_GOOGLE_NOCTURNE
config BOARD_GOOGLE_RAMMUS config BOARD_GOOGLE_RAMMUS
bool "-> Rammus" bool "-> Rammus"
select BOARD_GOOGLE_BASEBOARD_POPPY select BOARD_GOOGLE_BASEBOARD_POPPY
select VARIANT_SPECIFIC_OPTIONS_POPPY select VARIANT_SPECIFIC_OPTIONS_RAMMUS
config BOARD_GOOGLE_SORAKA config BOARD_GOOGLE_SORAKA
bool "-> Soraka" bool "-> Soraka"

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@ -0,0 +1 @@
SPD_SOURCES = empty # 0b0000

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@ -0,0 +1,16 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2018 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <baseboard/acpi/dptf.asl>

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@ -0,0 +1,86 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2018 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef __MAINBOARD_EC_H__
#define __MAINBOARD_EC_H__
#include <ec/ec.h>
#include <ec/google/chromeec/ec_commands.h>
#include <variant/gpio.h>
#define MAINBOARD_EC_SCI_EVENTS \
(EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_CLOSED) |\
EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_OPEN) |\
EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_CONNECTED) |\
EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_DISCONNECTED) |\
EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY_LOW) |\
EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY_CRITICAL) |\
EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY) |\
EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY_STATUS) |\
EC_HOST_EVENT_MASK(EC_HOST_EVENT_THERMAL_THRESHOLD) |\
EC_HOST_EVENT_MASK(EC_HOST_EVENT_THROTTLE_START) |\
EC_HOST_EVENT_MASK(EC_HOST_EVENT_THROTTLE_STOP) |\
EC_HOST_EVENT_MASK(EC_HOST_EVENT_PD_MCU) |\
EC_HOST_EVENT_MASK(EC_HOST_EVENT_MODE_CHANGE) |\
EC_HOST_EVENT_MASK(EC_HOST_EVENT_MKBP))
#define MAINBOARD_EC_SMI_EVENTS \
(EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_CLOSED))
/* EC can wake from S5 with lid or power button */
#define MAINBOARD_EC_S5_WAKE_EVENTS \
(EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_OPEN) |\
EC_HOST_EVENT_MASK(EC_HOST_EVENT_POWER_BUTTON))
/*
* EC can wake from S3 with lid or power button or key press or
* mode change event.
*/
#define MAINBOARD_EC_S3_WAKE_EVENTS \
(MAINBOARD_EC_S5_WAKE_EVENTS |\
EC_HOST_EVENT_MASK(EC_HOST_EVENT_KEY_PRESSED))
#define MAINBOARD_EC_S0IX_WAKE_EVENTS (MAINBOARD_EC_S3_WAKE_EVENTS)
/* Log EC wake events plus EC shutdown events */
#define MAINBOARD_EC_LOG_EVENTS \
(EC_HOST_EVENT_MASK(EC_HOST_EVENT_THERMAL_SHUTDOWN) |\
EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY_SHUTDOWN) |\
EC_HOST_EVENT_MASK(EC_HOST_EVENT_PANIC))
/*
* ACPI related definitions for ASL code.
*/
/* Enable EC backed PD MCU device in ACPI */
#define EC_ENABLE_PD_MCU_DEVICE
/* Enable LID switch and provide wake pin for EC */
#define EC_ENABLE_LID_SWITCH
#define EC_ENABLE_WAKE_PIN GPE_EC_WAKE
/* Enable Tablet switch */
#define EC_ENABLE_TABLET_EVENT
#define EC_ENABLE_TBMC_DEVICE
#define SIO_EC_MEMMAP_ENABLE /* EC Memory Map Resources */
#define SIO_EC_HOST_ENABLE /* EC Host Interface Resources */
#define SIO_EC_ENABLE_PS2K /* Enable PS/2 Keyboard */
/* Enable EC backed Keyboard Backlight in ACPI */
#define EC_ENABLE_KEYBOARD_BACKLIGHT
#endif /* __MAINBOARD_EC_H__ */

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@ -0,0 +1,21 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2018 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
* GNU General Public License for more details.
*/
#ifndef __MAINBOARD_GPIO_H__
#define __MAINBOARD_GPIO_H__
#include <baseboard/gpio.h>
#endif /* __MAINBOARD_GPIO_H__ */