soc/intel/meteorlake: Adjust discovery table offset based on CPUID
CPUID CPUID_METEORLAKE_B0 onwards the discovery table offset needs to be left-shifted by 3. Reference: EDS Vol 1 (640228) BUG=b:289600699 TEST=Able to boot google/rex with crashlog enabled. Change-Id: I90647fb6190a52b42298398263978beaf931b035 Signed-off-by: Pratikkumar Prajapati <pratikkumar.v.prajapati@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/76400 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subratabanik@google.com>
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@ -2,6 +2,8 @@
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#include <arch/bert_storage.h>
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#include <console/console.h>
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#include <cpu/cpu.h>
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#include <cpu/intel/cpu_ids.h>
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#include <device/pci_ops.h>
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#include <intelblocks/crashlog.h>
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#include <intelblocks/pmc_ipc.h>
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@ -351,6 +353,17 @@ static bool cpu_cl_get_capability(tel_crashlog_devsc_cap_t *cl_devsc_cap)
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return true;
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}
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static u32 get_disc_table_offset(void)
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{
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u32 offset = cpu_cl_devsc_cap.discovery_data.fields.discovery_table_offset;
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if (cpu_get_cpuid() >= CPUID_METEORLAKE_B0) {
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offset <<= 3;
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printk(BIOS_DEBUG, "adjusted cpu discovery table offset: 0x%x\n", offset);
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}
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return offset;
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}
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static bool cpu_cl_gen_discovery_table(void)
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{
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u32 bar_addr = 0, disc_tab_addr = 0;
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@ -359,16 +372,10 @@ static bool cpu_cl_gen_discovery_table(void)
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if (!bar_addr)
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return false;
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disc_tab_addr = bar_addr +
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cpu_cl_devsc_cap.discovery_data.fields.discovery_table_offset;
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disc_tab_addr = bar_addr + get_disc_table_offset();
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memset(&cpu_cl_disc_tab, 0, sizeof(cpu_crashlog_discovery_table_t));
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printk(BIOS_DEBUG, "cpu discovery table offset: 0x%x\n",
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cpu_cl_devsc_cap.discovery_data.fields.discovery_table_offset);
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cpu_cl_disc_tab.header.data = ((u64)read32((u32 *)disc_tab_addr) +
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((u64)read32((u32 *)(disc_tab_addr + 4)) << 32));
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printk(BIOS_DEBUG, "cpu_crashlog_discovery_table buffer count: 0x%x\n",
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cpu_cl_disc_tab.header.fields.count);
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