soc/intel/braswell: don't duplicate setting ACPI sleep state

The ramstage main() in lib/hardwaremain.c has the logic
to set the ACPI sleep state based on romstage_handoff. Thus,
there's no need to do it a second time.

Change-Id: I88af301024fd6f868f494a737d2cce14d85f8241
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/15661
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Lee Leahy <leroy.p.leahy@intel.com>
This commit is contained in:
Aaron Durbin 2016-07-13 11:54:12 -05:00
parent 97dc98658a
commit 0dca6490b9
1 changed files with 2 additions and 19 deletions

View File

@ -26,7 +26,6 @@
#include <device/pci_def.h>
#include <device/pci_ops.h>
#include <fsp/util.h>
#include <romstage_handoff.h>
#include <soc/gpio.h>
#include <soc/lpc.h>
#include <soc/msr.h>
@ -131,13 +130,6 @@ static void fill_in_pattrs(void)
attrs->bclk_khz = cpu_bus_freq_khz();
}
static inline void set_acpi_sleep_type(int val)
{
#if IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)
acpi_slp_type = val;
#endif
}
/* Save wake source information for calculating ACPI _SWS values */
int soc_fill_acpi_wake(uint32_t *pm1, uint32_t **gpe0)
{
@ -155,19 +147,10 @@ int soc_fill_acpi_wake(uint32_t *pm1, uint32_t **gpe0)
static void s3_resume_prepare(void)
{
global_nvs_t *gnvs;
struct romstage_handoff *romstage_handoff;
gnvs = cbmem_add(CBMEM_ID_ACPI_GNVS, sizeof(global_nvs_t));
romstage_handoff = cbmem_find(CBMEM_ID_ROMSTAGE_INFO);
if (romstage_handoff == NULL || romstage_handoff->s3_resume == 0) {
if (gnvs != NULL)
memset(gnvs, 0, sizeof(global_nvs_t));
set_acpi_sleep_type(0);
return;
}
set_acpi_sleep_type(3);
if (!acpi_is_wakeup_s3() && gnvs)
memset(gnvs, 0, sizeof(global_nvs_t));
}
static void set_board_id(void)