mainboard/*: Use generic winbond romstage in place of w83627thg
Use the generic implementation of winbond in place of the model specific w83627thg_enable_serial() as so that it maybe removed later. Change-Id: Ice1a0dc428de9a3ddfb79e877fb03c7a8e09665f Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/5603 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
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@ -34,6 +34,7 @@
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#include "southbridge/intel/i82801dx/i82801dx.h"
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#include "southbridge/intel/i82801dx/i82801dx.h"
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#include "northbridge/intel/i855/raminit.h"
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#include "northbridge/intel/i855/raminit.h"
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#include "northbridge/intel/i855/debug.c"
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#include "northbridge/intel/i855/debug.c"
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#include <superio/winbond/common/winbond.h>
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#include <superio/winbond/w83627thg/w83627thg.h>
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#include <superio/winbond/w83627thg/w83627thg.h>
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#include "cpu/x86/bist.h"
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#include "cpu/x86/bist.h"
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@ -56,7 +57,7 @@ void main(unsigned long bist)
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#endif
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#endif
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}
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}
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w83627thg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
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winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
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console_init();
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console_init();
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/* Halt if there was a built in self test failure */
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/* Halt if there was a built in self test failure */
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@ -31,6 +31,7 @@
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#include <pc80/mc146818rtc.h>
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#include <pc80/mc146818rtc.h>
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#include "cpu/x86/lapic.h"
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#include "cpu/x86/lapic.h"
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#include "northbridge/amd/amdk8/reset_test.c"
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#include "northbridge/amd/amdk8/reset_test.c"
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#include <superio/winbond/common/winbond.h>
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#include <superio/winbond/w83627thg/w83627thg.h>
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#include <superio/winbond/w83627thg/w83627thg.h>
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#include <cpu/amd/model_fxx_rev.h>
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#include <cpu/amd/model_fxx_rev.h>
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#include <console/console.h>
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#include <console/console.h>
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@ -127,7 +128,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
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if (bist == 0)
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if (bist == 0)
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bsp_apicid = init_cpus(cpu_init_detectedx);
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bsp_apicid = init_cpus(cpu_init_detectedx);
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w83627thg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
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winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
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console_init();
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console_init();
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/* Halt if there was a built in self test failure */
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/* Halt if there was a built in self test failure */
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@ -16,6 +16,7 @@
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#include "cpu/x86/lapic.h"
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#include "cpu/x86/lapic.h"
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#include "northbridge/amd/amdk8/reset_test.c"
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#include "northbridge/amd/amdk8/reset_test.c"
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#include "northbridge/amd/amdk8/debug.c"
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#include "northbridge/amd/amdk8/debug.c"
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#include <superio/winbond/common/winbond.h>
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#include <superio/winbond/w83627thg/w83627thg.h>
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#include <superio/winbond/w83627thg/w83627thg.h>
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#include "cpu/x86/bist.h"
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#include "cpu/x86/bist.h"
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#include "northbridge/amd/amdk8/setup_resource_map.c"
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#include "northbridge/amd/amdk8/setup_resource_map.c"
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@ -84,7 +85,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
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// post_code(0x32);
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// post_code(0x32);
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w83627thg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
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winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
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console_init();
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console_init();
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/* Halt if there was a built in self test failure */
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/* Halt if there was a built in self test failure */
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