mainboard/*: Use generic winbond romstage in place of w83627thg

Use the generic implementation of winbond in place of the model specific
w83627thg_enable_serial() as so that it maybe removed later.

Change-Id: Ice1a0dc428de9a3ddfb79e877fb03c7a8e09665f
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/5603
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
This commit is contained in:
Edward O'Callaghan 2014-04-29 13:59:54 +10:00 committed by Kyösti Mälkki
parent 04f5c4eca7
commit 0dd0669c59
3 changed files with 7 additions and 4 deletions

View File

@ -34,6 +34,7 @@
#include "southbridge/intel/i82801dx/i82801dx.h"
#include "northbridge/intel/i855/raminit.h"
#include "northbridge/intel/i855/debug.c"
#include <superio/winbond/common/winbond.h>
#include <superio/winbond/w83627thg/w83627thg.h>
#include "cpu/x86/bist.h"
@ -56,7 +57,7 @@ void main(unsigned long bist)
#endif
}
w83627thg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
console_init();
/* Halt if there was a built in self test failure */

View File

@ -31,6 +31,7 @@
#include <pc80/mc146818rtc.h>
#include "cpu/x86/lapic.h"
#include "northbridge/amd/amdk8/reset_test.c"
#include <superio/winbond/common/winbond.h>
#include <superio/winbond/w83627thg/w83627thg.h>
#include <cpu/amd/model_fxx_rev.h>
#include <console/console.h>
@ -127,7 +128,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
if (bist == 0)
bsp_apicid = init_cpus(cpu_init_detectedx);
w83627thg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
console_init();
/* Halt if there was a built in self test failure */

View File

@ -16,6 +16,7 @@
#include "cpu/x86/lapic.h"
#include "northbridge/amd/amdk8/reset_test.c"
#include "northbridge/amd/amdk8/debug.c"
#include <superio/winbond/common/winbond.h>
#include <superio/winbond/w83627thg/w83627thg.h>
#include "cpu/x86/bist.h"
#include "northbridge/amd/amdk8/setup_resource_map.c"
@ -84,7 +85,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
// post_code(0x32);
w83627thg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
console_init();
/* Halt if there was a built in self test failure */