This patch aims to restructure SPI flash support in a more reasonable
way. It introduces a generic SPI host driver for the IT8716F Super I/O which will enable easy SPI programming without having to care for the peculiarities of the SPI host. To activate probing for the IT8716F, you have to use the gigabyte:m57sli mainboard override. SPI support will then use the gathered SPI host data to access the SPI flash. This has been tested sucessfully by Ward Vandewege <ward@gnu.org> on the GA-M57SLI v2.0, which has a MX25L4005 SPI flash part. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Ward Vandewege <ward@gnu.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2817 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -30,6 +30,15 @@
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#include <string.h>
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#include <string.h>
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#include "flash.h"
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#include "flash.h"
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#define ITE_SUPERIO_PORT1 0x2e
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#define ITE_SUPERIO_PORT2 0x4e
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#define JEDEC_RDID {0x9f}
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#define JEDEC_RDID_OUTSIZE 0x01
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#define JEDEC_RDID_INSIZE 0x03
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static uint16_t it8716f_flashport = 0;
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/* Generic Super I/O helper functions */
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/* Generic Super I/O helper functions */
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uint8_t regval(uint16_t port, uint8_t reg)
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uint8_t regval(uint16_t port, uint8_t reg)
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{
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{
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@ -51,7 +60,7 @@ static void enter_conf_mode_ite(uint16_t port)
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outb(0x87, port);
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outb(0x87, port);
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outb(0x01, port);
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outb(0x01, port);
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outb(0x55, port);
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outb(0x55, port);
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if (port == 0x2e)
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if (port == ITE_SUPERIO_PORT1)
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outb(0x55, port);
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outb(0x55, port);
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else
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else
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outb(0xaa, port);
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outb(0xaa, port);
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@ -96,35 +105,97 @@ static uint16_t find_ite_serial_flash_port(uint16_t port)
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return flashport;
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return flashport;
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}
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}
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static void it8716_serial_rdid(uint16_t port)
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/* The IT8716F only supports commands with length 1,2,4,5 bytes including
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command byte and can not read more than 3 bytes from the device.
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This function expects writearr[0] to be the first byte sent to the device,
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whereas the IT8716F splits commands internally into address and non-address
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commands with the address in inverse wire order. That's why the register
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ordering in case 4 and 5 may seem strange. */
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static int it8716f_spi_command(uint16_t port, unsigned char writecnt, unsigned char readcnt, const unsigned char *writearr, unsigned char *readarr)
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{
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{
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uint8_t busy, data0, data1, data2;
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uint8_t busy, writeenc;
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do {
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do {
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busy = inb(port) & 0x80;
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busy = inb(port) & 0x80;
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} while (busy);
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} while (busy);
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/* RDID */
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if (readcnt > 3) {
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outb(0x9f, port + 1);
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printf("%s called with unsupported readcnt %i\n",
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/* Start IO, 33MHz, 3 input bytes, 0 output bytes*/
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__FUNCTION__, readcnt);
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outb((0x5<<4)|(0x3<<2)|(0x0), port);
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return 1;
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}
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switch (writecnt) {
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case 1:
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outb(writearr[0], port + 1);
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writeenc = 0x0;
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break;
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case 2:
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outb(writearr[0], port + 1);
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outb(writearr[1], port + 7);
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writeenc = 0x1;
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break;
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case 4:
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outb(writearr[0], port + 1);
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outb(writearr[1], port + 4);
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outb(writearr[2], port + 3);
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outb(writearr[3], port + 2);
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writeenc = 0x2;
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break;
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case 5:
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outb(writearr[0], port + 1);
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outb(writearr[1], port + 4);
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outb(writearr[2], port + 3);
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outb(writearr[3], port + 2);
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outb(writearr[4], port + 7);
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writeenc = 0x3;
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break;
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default:
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printf("%s called with unsupported writecnt %i\n",
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__FUNCTION__, writecnt);
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return 1;
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}
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/* Start IO, 33MHz, readcnt input bytes, writecnt output bytes. Note:
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We can't use writecnt directly, but have to use a strange encoding */
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outb((0x5 << 4) | ((readcnt & 0x3) << 2) | (writeenc), port);
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do {
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do {
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busy = inb(port) & 0x80;
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busy = inb(port) & 0x80;
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} while (busy);
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} while (busy);
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data0 = inb(port + 5);
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readarr[0] = inb(port + 5);
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data1 = inb(port + 6);
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readarr[1] = inb(port + 6);
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data2 = inb(port + 7);
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readarr[2] = inb(port + 7);
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printf("RDID returned %02x %02x %02x\n", data0, data1, data2);
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return 0;
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return;
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}
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static int it8716f_serial_rdid(uint16_t port, unsigned char *readarr)
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{
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const unsigned char cmd[] = JEDEC_RDID;
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if (it8716f_spi_command(port, JEDEC_RDID_OUTSIZE, JEDEC_RDID_INSIZE, cmd, readarr))
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return 1;
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printf("RDID returned %02x %02x %02x\n", readarr[0], readarr[1], readarr[2]);
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return 0;
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}
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}
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static int it87xx_probe_serial_flash(const char *name)
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static int it87xx_probe_serial_flash(const char *name)
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{
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{
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uint16_t flashport;
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it8716f_flashport = find_ite_serial_flash_port(ITE_SUPERIO_PORT1);
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flashport = find_ite_serial_flash_port(0x2e);
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if (!it8716f_flashport)
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if (flashport)
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it8716f_flashport = find_ite_serial_flash_port(ITE_SUPERIO_PORT2);
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it8716_serial_rdid(flashport);
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return (!it8716f_flashport);
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flashport = find_ite_serial_flash_port(0x4e);
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}
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if (flashport)
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it8716_serial_rdid(flashport);
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int probe_spi(struct flashchip *flash)
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{
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unsigned char readarr[3];
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uint8_t manuf_id;
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uint16_t model_id;
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if (it8716f_flashport) {
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it8716f_serial_rdid(it8716f_flashport, readarr);
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manuf_id = readarr[0];
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model_id = (readarr[1] << 8) | readarr[2];
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printf_debug("%s: id1 0x%x, id2 0x%x\n", __FUNCTION__, manuf_id, model_id);
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if (manuf_id == flash->manufacture_id && model_id == flash->model_id)
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return 1;
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}
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return 0;
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return 0;
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}
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}
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@ -55,6 +55,8 @@ extern struct flashchip flashchips[];
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/* Please keep this list sorted alphabetically by manufacturer. The first
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/* Please keep this list sorted alphabetically by manufacturer. The first
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* entry of each section should be the manufacturer ID, followed by the
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* entry of each section should be the manufacturer ID, followed by the
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* list of devices from that manufacturer (sorted by device IDs).
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* list of devices from that manufacturer (sorted by device IDs).
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* All LPC/FWH parts (parallel flash) have 8-bit device IDs.
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* All SPI parts have 16-bit device IDs.
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*/
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*/
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#define AMD_ID 0x01 /* AMD */
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#define AMD_ID 0x01 /* AMD */
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@ -68,8 +70,31 @@ extern struct flashchip flashchips[];
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#define AT_29C040A 0xA4
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#define AT_29C040A 0xA4
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#define AT_29C020 0xDA
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#define AT_29C020 0xDA
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#define EON_ID 0x1C
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/* EN25 chips are SPI, first byte of device id is memory type,
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second byte of device id is log(bitsize)-9 */
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#define EN_25B05 0x2010 /* 2^19 kbit or 2^16 kByte */
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#define EN_25B10 0x2011
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#define EN_25B20 0x2012
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#define EN_25B40 0x2013
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#define EN_25B80 0x2014
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#define EN_25B16 0x2015
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#define EN_25B32 0x2016
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#define MX_ID 0xC2 /* Macronix (MX) */
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#define MX_ID 0xC2 /* Macronix (MX) */
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#define MX_29F002 0xB0
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#define MX_29F002 0xB0
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/* MX25L chips are SPI, first byte of device id is memory type,
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second byte of device id is log(bitsize)-9 */
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#define MX_25L512 0x2010 /* 2^19 kbit or 2^16 kByte */
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#define MX_25L1005 0x2011
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#define MX_25L2005 0x2012
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#define MX_25L4005 0x2013 /* MX25L4005{,A} */
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#define MX_25L8005 0x2014
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#define MX_25L1605 0x2015 /* MX25L1605{,A,D} */
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#define MX_25L3205 0x2016 /* MX25L3205{,A} */
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#define MX_25L6405 0x2017 /* MX25L3205{,D} */
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#define MX_25L1635D 0x2415
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#define MX_25L3235D 0x2416
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#define SHARP_ID 0xB0 /* Sharp */
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#define SHARP_ID 0xB0 /* Sharp */
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#define SHARP_LHF00L04 0xCF
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#define SHARP_LHF00L04 0xCF
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@ -182,6 +207,8 @@ int handle_romentries(uint8_t *buffer, uint8_t *content);
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int linuxbios_init(void);
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int linuxbios_init(void);
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extern char *lb_part, *lb_vendor;
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extern char *lb_part, *lb_vendor;
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int probe_spi(struct flashchip *flash);
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/* 82802ab.c */
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/* 82802ab.c */
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int probe_82802ab(struct flashchip *flash);
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int probe_82802ab(struct flashchip *flash);
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int erase_82802ab(struct flashchip *flash);
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int erase_82802ab(struct flashchip *flash);
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@ -38,6 +38,8 @@ struct flashchip flashchips[] = {
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probe_jedec, erase_chip_jedec, write_jedec},
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probe_jedec, erase_chip_jedec, write_jedec},
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{"Mx29f002", MX_ID, MX_29F002, 256, 64 * 1024,
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{"Mx29f002", MX_ID, MX_29F002, 256, 64 * 1024,
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probe_29f002, erase_29f002, write_29f002},
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probe_29f002, erase_29f002, write_29f002},
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{"MX25L4005", MX_ID, MX_25L4005, 512, 4 * 1024,
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probe_spi, NULL, NULL},
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{"SST29EE020A", SST_ID, SST_29EE020A, 256, 128,
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{"SST29EE020A", SST_ID, SST_29EE020A, 256, 128,
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probe_jedec, erase_chip_jedec, write_jedec},
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probe_jedec, erase_chip_jedec, write_jedec},
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{"SST28SF040A", SST_ID, SST_28SF040, 512, 256,
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{"SST28SF040A", SST_ID, SST_28SF040, 512, 256,
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