soc/intel/skylake: Add support for SPI device
Add a new PCI driver for SPI devices with supported PCI ids. Also, provide a translation table to convert struct device structure into SPI bus number. BUG=chrome-os-partner:59832 BRANCH=None TEST=Compiles successfully Change-Id: If860eb819f2ce5ae5443f808b356af57f86c52be Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/18341 Tested-by: build bot (Jenkins) Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
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@ -176,4 +176,14 @@ static inline int i2c_devfn_to_bus(unsigned devfn)
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return -1;
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}
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static inline int spi_devfn_to_bus(unsigned devfn)
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{
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switch (devfn) {
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case PCH_DEVFN_SPI: return 0;
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case PCH_DEVFN_GSPI0: return 1;
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case PCH_DEVFN_GSPI1: return 2;
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}
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return -1;
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}
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#endif
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@ -15,6 +15,12 @@
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*/
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#include <console/console.h>
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#include <device/device.h>
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#include <device/pci.h>
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#include <device/pci_def.h>
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#include <device/pci_ids.h>
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#include <device/spi.h>
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#include <soc/ramstage.h>
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#include <spi-generic.h>
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/* SPI controller managing the flash-device SPI. */
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@ -61,3 +67,34 @@ const struct spi_ctrlr_buses spi_ctrlr_bus_map[] = {
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};
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const size_t spi_ctrlr_bus_map_count = ARRAY_SIZE(spi_ctrlr_bus_map);
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#if ENV_RAMSTAGE && !defined(__SIMPLE_DEVICE__)
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static int spi_dev_to_bus(struct device *dev)
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{
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return spi_devfn_to_bus(dev->path.pci.devfn);
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}
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static struct spi_bus_operations spi_bus_ops = {
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.dev_to_bus = &spi_dev_to_bus,
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};
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static struct device_operations spi_dev_ops = {
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.read_resources = &pci_dev_read_resources,
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.set_resources = &pci_dev_set_resources,
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.enable_resources = &pci_dev_enable_resources,
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.scan_bus = &scan_generic_bus,
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.ops_pci = &soc_pci_ops,
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.ops_spi_bus = &spi_bus_ops,
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};
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static const unsigned short pci_device_ids[] = {
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0x9d24, 0x9d29, 0x9d2a, 0
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};
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static const struct pci_driver pch_spi __pci_driver = {
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.ops = &spi_dev_ops,
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.vendor = PCI_VENDOR_ID_INTEL,
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.devices = pci_device_ids,
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};
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#endif
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