nb/intel/sandybridge/gma.c: Remove useless if condition
There's a useless check with both branches doing the same: enabling RC6 and disabling RC6p. In past, this condition would enable RC6p in IVB but not on SNB. Then, at some point, RC6p was considered unstable and was disabled, but the condition remained. It's not needed so let's remove it. Change-Id: I926bb682d1b9d21185048224490b966c33204b6a Signed-off-by: Evgeny Zinoviev <me@ch1p.io> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42410 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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@ -453,18 +453,15 @@ static void gma_pm_init_pre_vbios(struct device *dev)
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gtt_write(0xa06c, 0x000493e0); /* RP Down EI */
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gtt_write(0xa06c, 0x000493e0); /* RP Down EI */
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gtt_write(0xa070, 0x0000000a); /* RP Idle Hysteresis */
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gtt_write(0xa070, 0x0000000a); /* RP Idle Hysteresis */
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/* 11a: Enable Render Standby (RC6) */
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/*
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if ((bridge_silicon_revision() & BASE_REV_MASK) == BASE_REV_IVB) {
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* 11a: Enable Render Standby (RC6)
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/*
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*
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* IvyBridge should also support DeepRenderStandby.
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* IvyBridge should also support DeepRenderStandby.
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*
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*
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* Unfortunately it does not work reliably on all SKUs so
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* Unfortunately it does not work reliably on all SKUs so
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* disable it here and it can be enabled by the kernel.
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* disable it here and it can be enabled by the kernel.
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*/
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*/
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gtt_write(0xa090, 0x88040000); /* HW RC Control */
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gtt_write(0xa090, 0x88040000); /* HW RC Control */
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} else {
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gtt_write(0xa090, 0x88040000); /* HW RC Control */
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}
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/* 12: Normal Frequency Request */
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/* 12: Normal Frequency Request */
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/* RPNFREQ_VAL comes from MCHBAR 0x5998 23:16 */
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/* RPNFREQ_VAL comes from MCHBAR 0x5998 23:16 */
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