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cpu/amd/fam10h-15h: Fix Family 15h boot hang when BSP lift enabled 

The existing code did not allow for the second core of the BSP to
reside on an APIC ID other than 1, leading to a boot hang on Family
15h processors when APIC_ID_OFFSET was set to anything other than 0.
Furthermore, insufficient AP stack space was allocated for AP start.

Change-Id: I4ded3cfb3736149e2265848014352d7622d5042a
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/13158
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
This commit is contained in:
Timothy Pearson 2015-11-24 14:11:58 -06:00 committed by Martin Roth
parent 3679d7f909
commit 0df7046ad0
2 changed files with 8 additions and 2 deletions
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2
src/cpu/amd/family_10h-family_15h/Kconfig
View File

@ -48,7 +48,7 @@ config DCACHE_BSP_STACK_SLUSH
config DCACHE_AP_STACK_SIZE
hex
default 0x400
default 0x500
config UDELAY_IO
bool

8
src/cpu/amd/family_10h-family_15h/init_cpus.c
View File

@ -356,6 +356,7 @@ static u32 init_cpus(u32 cpu_init_detectedx, struct sys_info *sysinfo)
uint32_t dword;
uint8_t set_mtrrs;
uint8_t node_count;
uint8_t fam15_bsp_core1_apicid;
struct node_core_id id;
/* Please refer to the calculations and explaination in cache_as_ram.inc before modifying these values */
@ -483,7 +484,12 @@ static u32 init_cpus(u32 cpu_init_detectedx, struct sys_info *sysinfo)
if (is_fam15h()) {
/* core 1 on node 0 is special; to avoid corrupting the
* BSP do not alter MTRRs on that core */
if (apicid == 1)
if (IS_ENABLED(CONFIG_ENABLE_APIC_EXT_ID) && (CONFIG_APIC_ID_OFFSET > 0))
fam15_bsp_core1_apicid = CONFIG_APIC_ID_OFFSET + 1;
else
fam15_bsp_core1_apicid = 1;
if (apicid == fam15_bsp_core1_apicid)
set_mtrrs = 0;
else
set_mtrrs = !!(apicid & 0x1);