util/spd_tools/lp4x: Update README
The lp4x spd_tools also support Alder Lake (ADL), so update the the README to reflect this fact. Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Change-Id: Iedb1ea1c3558e5f179feac2c725667db5b327b2e Reviewed-on: https://review.coreboot.org/c/coreboot/+/56857 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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# LPDDR4x SPD tools README
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Tools for generating SPD files for LPDDR4x memory used in memory down
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configurations on Intel Tiger Lake (TGL) and Jasper Lake (JSL) based
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platforms. These tools generate SPDs following JESD209-4C
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specification and Intel recommendations (doc #616599, #610202) for
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LPDDR4x SPD.
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configurations on Intel Tiger Lake (TGL), Jasper Lake (JSL), and Alder
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Lake (ADL) based platforms. These tools generate SPDs following
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JESD209-4C specification and Intel recommendations (doc #616599,
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#610202, #634730) for LPDDR4x SPD.
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There are two tools provided that assist TGL and JSL based mainboards
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to generate SPDs and Makefile to integrate these SPDs in coreboot
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build. These tools can also be used to allocate DRAM IDs (configure
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DRAM hardware straps) for any LPDDR4x memory part used by the board.
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There are two tools provided that assist TGL, JSL and ADL based
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mainboards to generate SPDs and Makefile to integrate these SPDs in
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coreboot build. These tools can also be used to allocate DRAM IDs
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(configure DRAM hardware straps) for any LPDDR4x memory part used by the
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board.
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* gen_spd.go: Generates de-duplicated SPD files using a global memory
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part list provided by the mainboard in JSON format. Additionally,
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attributes as per the datasheet. This is the list of all known
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LPDDR4x memory parts irrespective of their usage on the board.
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* SoC platform name for which the SPDs are being generated. Currently
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supported platform names are `TGL` and `JSL`.
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supported platform names are `TGL`, `JSL` and `ADL`.
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Input JSON file requires the following two fields for every memory part:
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* `name`: Name of the memory part
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