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drivers: Drop level of indirection for MMIO HW access 

We don't need another level of indirection for these
hardware accesses.

Change-Id: Ic567d8272e5dd943ce19babbd7ad57ba5d86c354
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/20580
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
This commit is contained in:
Stefan Reinauer 2017-07-14 20:25:05 +02:00 committed by Martin Roth
parent b8534f767c
commit 0e660873bf
2 changed files with 6 additions and 38 deletions
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36
src/drivers/aspeed/common/aspeed_coreboot.h
View File

@ -78,30 +78,6 @@ static inline void *kzalloc(size_t size, int flags) {
return ptr; return ptr;
} }
static inline void writel(u32 val, volatile void *addr) {
*(u32*)addr = val;
}
static inline u32 readl(const volatile void *addr) {
return *(u32*)addr;
}
static inline void writew(u16 val, volatile void *addr) {
*(u16*)addr = val;
}
static inline u16 readw(const volatile void *addr) {
return *(u16*)addr;
}
static inline void writeb(u8 val, volatile void *addr) {
*(u8*)addr = val;
}
static inline u8 readb(const volatile void *addr) {
return *(u8*)addr;
}
static inline int pci_read_config_dword(struct pci_dev *dev, int where, static inline int pci_read_config_dword(struct pci_dev *dev, int where,
u32 *val) u32 *val)
{ {
@ -152,27 +128,27 @@ static inline resource_t pci_resource_start(struct pci_dev *dev, u8 bar) {
} }
static inline unsigned int ioread32(void __iomem *p) { static inline unsigned int ioread32(void __iomem *p) {
return readl(p); return read32(p);
} }
static inline void iowrite32(u32 val, void __iomem *p) { static inline void iowrite32(u32 val, void __iomem *p) {
writel(val, p); write32(p, val);
} }
static inline unsigned int ioread16(void __iomem *p) { static inline unsigned int ioread16(void __iomem *p) {
return readw(p); return read16(p);
} }
static inline void iowrite16(u16 val, void __iomem *p) { static inline void iowrite16(u16 val, void __iomem *p) {
writew(val, p); write16(p, val);
} }
static inline unsigned int ioread8(void __iomem *p) { static inline unsigned int ioread8(void __iomem *p) {
return readb(p); return read8(p);
} }
static inline void iowrite8(u8 val, void __iomem *p) { static inline void iowrite8(u8 val, void __iomem *p) {
writeb(val, p); write8(p, val);
} }
static inline unsigned int ioread_cbio32(void __iomem *p) { static inline unsigned int ioread_cbio32(void __iomem *p) {

8
src/drivers/xgi/common/xgi_coreboot.h
View File

@ -228,14 +228,6 @@ typedef u64 phys_addr_t;
#define pr_debug(format, arg...) printk(BIOS_INFO, "XGI VGA: " format, ##arg) #define pr_debug(format, arg...) printk(BIOS_INFO, "XGI VGA: " format, ##arg)
#define pr_err(format, arg...) printk(BIOS_ERR, "XGI VGA: " format, ##arg) #define pr_err(format, arg...) printk(BIOS_ERR, "XGI VGA: " format, ##arg)
static inline void writel(u32 val, volatile void *addr) {
*(u32*)addr = val;
}
static inline u32 readl(const volatile void *addr) {
return *(u32*)addr;
}
static inline int pci_read_config_dword(struct pci_dev *dev, int where, static inline int pci_read_config_dword(struct pci_dev *dev, int where,
u32 *val) u32 *val)
{ {