soc/intel/cannonlake: Add audio NHLT support

Add audio NHLT support for cannonlake, reference code is implementation
in apollolake.

CQ-DEPEND=CL:*533799
BUG=None
TEST=None

Change-Id: Ie8561cc64412bef54329b317874a8fe12e0bf889
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Signed-off-by: Sathyanarayana Nujella <sathyanarayana.nujella@intel.com>
Reviewed-on: https://review.coreboot.org/22134
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Lijian Zhao 2017-10-22 18:30:39 -07:00 committed by Martin Roth
parent 1f84704636
commit 0e956f2052
4 changed files with 321 additions and 0 deletions

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@ -8,6 +8,7 @@ if SOC_INTEL_CANNONLAKE
config CPU_SPECIFIC_OPTIONS
def_bool y
select ACPI_INTEL_HARDWARE_SLEEP_VALUES
select ACPI_NHLT
select ARCH_BOOTBLOCK_X86_32
select ARCH_RAMSTAGE_X86_32
select ARCH_ROMSTAGE_X86_32
@ -67,6 +68,7 @@ config CPU_SPECIFIC_OPTIONS
select SOC_INTEL_COMMON_BLOCK_SPI
select SOC_INTEL_COMMON_BLOCK_TIMER
select SOC_INTEL_COMMON_BLOCK_UART
select SOC_INTEL_COMMON_NHLT
select SOC_INTEL_COMMON_RESET
select SSE2
select SUPPORT_CPU_UCODE_IN_CBFS
@ -111,6 +113,41 @@ config IED_REGION_SIZE
hex
default 0x400000
config NHLT_DMIC_1CH_16B
bool
depends on ACPI_NHLT
default n
help
Include DSP firmware settings for 1 channel 16B DMIC array.
config NHLT_DMIC_2CH_16B
bool
depends on ACPI_NHLT
default n
help
Include DSP firmware settings for 2 channel 16B DMIC array.
config NHLT_DMIC_4CH_16B
bool
depends on ACPI_NHLT
default n
help
Include DSP firmware settings for 4 channel 16B DMIC array.
config NHLT_MAX98357
bool
depends on ACPI_NHLT
default n
help
Include DSP firmware settings for headset codec.
config NHLT_DA7219
bool
depends on ACPI_NHLT
default n
help
Include DSP firmware settings for headset codec.
config MAX_ROOT_PORTS
int
default 16

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@ -42,6 +42,7 @@ ramstage-y += gpio.c
ramstage-y += i2c.c
ramstage-y += lpc.c
ramstage-y += memmap.c
ramstage-y += nhlt.c
ramstage-y += pmc.c
ramstage-y += pmutil.c
ramstage-$(CONFIG_PLATFORM_USES_FSP2_0) += reset.c
@ -73,4 +74,32 @@ CPPFLAGS_common += -I$(src)/vendorcode/intel/fsp/fsp2_0/cannonlake
CPPFLAGS_common += -I$(src)/soc/intel/cannonlake
CPPFLAGS_common += -I$(src)/soc/intel/cannonlake/include
# DSP firmware settings files.
NHLT_BLOB_PATH = 3rdparty/blobs/soc/intel/cnl/nhlt-blobs
DMIC_1CH_48KHZ_16B = dmic-1ch-48khz-16b.bin
DMIC_2CH_48KHZ_16B = dmic-2ch-48khz-16b.bin
DMIC_4CH_48KHZ_16B = dmic-4ch-48khz-16b.bin
MAX98357_RENDER = max98357-render-2ch-48khz-24b.bin
DA7219_RENDER_CAPTURE = dialog-2ch-48khz-24b.bin
cbfs-files-$(CONFIG_NHLT_DMIC_1CH_16B) += $(DMIC_1CH_48KHZ_16B)
$(DMIC_1CH_48KHZ_16B)-file := $(NHLT_BLOB_PATH)/$(DMIC_1CH_48KHZ_16B)
$(DMIC_1CH_48KHZ_16B)-type := raw
cbfs-files-$(CONFIG_NHLT_DMIC_2CH_16B) += $(DMIC_2CH_48KHZ_16B)
$(DMIC_2CH_48KHZ_16B)-file := $(NHLT_BLOB_PATH)/$(DMIC_2CH_48KHZ_16B)
$(DMIC_2CH_48KHZ_16B)-type := raw
cbfs-files-$(CONFIG_NHLT_DMIC_4CH_16B) += $(DMIC_4CH_48KHZ_16B)
$(DMIC_4CH_48KHZ_16B)-file := $(NHLT_BLOB_PATH)/$(DMIC_4CH_48KHZ_16B)
$(DMIC_4CH_48KHZ_16B)-type := raw
cbfs-files-$(CONFIG_NHLT_MAX98357) += $(MAX98357_RENDER)
$(MAX98357_RENDER)-file := $(NHLT_BLOB_PATH)/$(MAX98357_RENDER)
$(MAX98357_RENDER)-type := raw
cbfs-files-$(CONFIG_NHLT_DA7219) += $(DA7219_RENDER_CAPTURE)
$(DA7219_RENDER_CAPTURE)-file := $(NHLT_BLOB_PATH)/$(DA7219_RENDER_CAPTURE)
$(DA7219_RENDER_CAPTURE)-type := raw
endif

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@ -0,0 +1,43 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2017 Intel Corp.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef _SOC_CANNONLAKE_NHLT_H_
#define _SOC_CANNONLAKE_NHLT_H_
#include <nhlt.h>
#define NHLT_VID 0x8086
#define NHLT_DID_DMIC 0xae20
#define NHLT_DID_BT 0xae30
#define NHLT_DID_SSP 0xae34
/* The following link values should be used for the hwlink parameters below. */
enum {
AUDIO_LINK_SSP0,
AUDIO_LINK_SSP1,
AUDIO_LINK_SSP2,
AUDIO_LINK_SSP3,
AUDIO_LINK_SSP4,
AUDIO_LINK_SSP5,
AUDIO_LINK_DMIC,
};
/* Returns < 0 on error, 0 on success. */
int nhlt_soc_add_dmic_array(struct nhlt *nhlt, int num_channels);
int nhlt_soc_add_max98357(struct nhlt *nhlt, int hwlink);
int nhlt_soc_add_da7219(struct nhlt *nhlt, int hwlink);
#endif

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@ -0,0 +1,212 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2017 Intel Corp.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <console/console.h>
#include <nhlt.h>
#include <soc/nhlt.h>
static const struct nhlt_format_config dmic_1ch_formats[] = {
/* 48 KHz 16-bits per sample. */
{
.num_channels = 1,
.sample_freq_khz = 48,
.container_bits_per_sample = 16,
.valid_bits_per_sample = 16,
.settings_file = "dmic-1ch-48khz-16b.bin",
},
};
static const struct nhlt_dmic_array_config dmic_1ch_mic_config = {
.tdm_config = {
.config_type = NHLT_TDM_MIC_ARRAY,
},
.array_type = NHLT_MIC_ARRAY_VENDOR_DEFINED,
};
static const struct nhlt_endp_descriptor dmic_1ch_descriptors[] = {
{
.link = NHLT_LINK_PDM,
.device = NHLT_PDM_DEV,
.direction = NHLT_DIR_CAPTURE,
.vid = NHLT_VID,
.did = NHLT_DID_DMIC,
.cfg = &dmic_1ch_mic_config,
.cfg_size = sizeof(dmic_1ch_mic_config),
.formats = dmic_1ch_formats,
.num_formats = ARRAY_SIZE(dmic_1ch_formats),
},
};
static const struct nhlt_format_config dmic_2ch_formats[] = {
/* 48 KHz 16-bits per sample. */
{
.num_channels = 2,
.sample_freq_khz = 48,
.container_bits_per_sample = 16,
.valid_bits_per_sample = 16,
.settings_file = "dmic-2ch-48khz-16b.bin",
},
};
static const struct nhlt_dmic_array_config dmic_2ch_mic_config = {
.tdm_config = {
.config_type = NHLT_TDM_MIC_ARRAY,
},
.array_type = NHLT_MIC_ARRAY_2CH_SMALL,
};
static const struct nhlt_endp_descriptor dmic_2ch_descriptors[] = {
{
.link = NHLT_LINK_PDM,
.device = NHLT_PDM_DEV,
.direction = NHLT_DIR_CAPTURE,
.vid = NHLT_VID,
.did = NHLT_DID_DMIC,
.cfg = &dmic_2ch_mic_config,
.cfg_size = sizeof(dmic_2ch_mic_config),
.formats = dmic_2ch_formats,
.num_formats = ARRAY_SIZE(dmic_2ch_formats),
},
};
static const struct nhlt_format_config dmic_4ch_formats[] = {
/* 48 KHz 16-bits per sample. */
{
.num_channels = 4,
.sample_freq_khz = 48,
.container_bits_per_sample = 16,
.valid_bits_per_sample = 16,
.settings_file = "dmic-4ch-48khz-16b.bin",
},
};
static const struct nhlt_dmic_array_config dmic_4ch_mic_config = {
.tdm_config = {
.config_type = NHLT_TDM_MIC_ARRAY,
},
.array_type = NHLT_MIC_ARRAY_4CH_L_SHAPED,
};
static const struct nhlt_endp_descriptor dmic_4ch_descriptors[] = {
{
.link = NHLT_LINK_PDM,
.device = NHLT_PDM_DEV,
.direction = NHLT_DIR_CAPTURE,
.vid = NHLT_VID,
.did = NHLT_DID_DMIC,
.cfg = &dmic_4ch_mic_config,
.cfg_size = sizeof(dmic_4ch_mic_config),
.formats = dmic_4ch_formats,
.num_formats = ARRAY_SIZE(dmic_4ch_formats),
},
};
static const struct nhlt_format_config da7219_formats[] = {
/* 48 KHz 24-bits per sample. */
{
.num_channels = 2,
.sample_freq_khz = 48,
.container_bits_per_sample = 32,
.valid_bits_per_sample = 24,
.settings_file = "dialog-2ch-48khz-24b.bin",
},
};
static const struct nhlt_tdm_config tdm_config = {
.virtual_slot = 0,
.config_type = NHLT_TDM_BASIC,
};
static const struct nhlt_endp_descriptor da7219_descriptors[] = {
/* Render Endpoint */
{
.link = NHLT_LINK_SSP,
.device = NHLT_SSP_DEV_I2S,
.direction = NHLT_DIR_RENDER,
.vid = NHLT_VID,
.did = NHLT_DID_SSP,
.cfg = &tdm_config,
.cfg_size = sizeof(tdm_config),
.formats = da7219_formats,
.num_formats = ARRAY_SIZE(da7219_formats),
},
/* Capture Endpoint */
{
.link = NHLT_LINK_SSP,
.device = NHLT_SSP_DEV_I2S,
.direction = NHLT_DIR_CAPTURE,
.vid = NHLT_VID,
.did = NHLT_DID_SSP,
.cfg = &tdm_config,
.cfg_size = sizeof(tdm_config),
.formats = da7219_formats,
.num_formats = ARRAY_SIZE(da7219_formats),
},
};
static const struct nhlt_format_config max98357_formats[] = {
/* 48 KHz 24-bits per sample. */
{
.num_channels = 2,
.sample_freq_khz = 48,
.container_bits_per_sample = 32,
.valid_bits_per_sample = 24,
.settings_file = "max98357-render-2ch-48khz-24b.bin",
},
};
static const struct nhlt_endp_descriptor max98357_descriptors[] = {
{
.link = NHLT_LINK_SSP,
.device = NHLT_SSP_DEV_I2S,
.direction = NHLT_DIR_RENDER,
.vid = NHLT_VID,
.did = NHLT_DID_SSP,
.formats = max98357_formats,
.num_formats = ARRAY_SIZE(max98357_formats),
},
};
int nhlt_soc_add_dmic_array(struct nhlt *nhlt, int num_channels)
{
switch (num_channels) {
case 1:
return nhlt_add_endpoints(nhlt, dmic_1ch_descriptors,
ARRAY_SIZE(dmic_1ch_descriptors));
case 2:
return nhlt_add_endpoints(nhlt, dmic_2ch_descriptors,
ARRAY_SIZE(dmic_2ch_descriptors));
case 4:
return nhlt_add_endpoints(nhlt, dmic_4ch_descriptors,
ARRAY_SIZE(dmic_4ch_descriptors));
default:
return -1;
}
}
int nhlt_soc_add_da7219(struct nhlt *nhlt, int hwlink)
{
/* Virtual bus id of SSP links are the hardware port ids proper. */
return nhlt_add_ssp_endpoints(nhlt, hwlink, da7219_descriptors,
ARRAY_SIZE(da7219_descriptors));
}
int nhlt_soc_add_max98357(struct nhlt *nhlt, int hwlink)
{
/* Virtual bus id of SSP links are the hardware port ids proper. */
return nhlt_add_ssp_endpoints(nhlt, hwlink, max98357_descriptors,
ARRAY_SIZE(max98357_descriptors));
}