mainboard/opencellular/rotundu: Add FMAP support
* Add 8M and 16M fmap configurations. * Fix kconfig selects. * Add vboot options and fixes Change-Id: I49d97a9d324207e45520d43b814b03a20005122a Signed-off-by: zaolin <zaolin@das-labor.org> Reviewed-on: https://review.coreboot.org/25084 Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -18,7 +18,7 @@
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config BOARD_OPENCELLULAR_BASEBOARD_ROTUNDU
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def_bool n
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select SOC_INTEL_FSP_BAYTRAIL
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select BOARD_ROMSIZE_KB_16384
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select BOARD_ROMSIZE_KB_8192
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select HAVE_ACPI_TABLES
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select HAVE_OPTION_TABLE
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select ENABLE_BUILTIN_COM1
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@ -32,6 +32,21 @@ config BOARD_OPENCELLULAR_BASEBOARD_ROTUNDU
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if BOARD_OPENCELLULAR_BASEBOARD_ROTUNDU
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config VBOOT
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select MRC_CACHE_FMAP
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select VBOOT_VBNV_CMOS
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select VBOOT_NO_BOARD_SUPPORT
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select GBB_FLAG_DISABLE_LID_SHUTDOWN
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select GBB_FLAG_DISABLE_PD_SOFTWARE_SYNC
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select GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC
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select GBB_FLAG_DISABLE_FWMP
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config GBB_HWID
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string
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depends on VBOOT
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default "ROTUNDU" if BOARD_OPENCELLULAR_ROTUNDU
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default "SUPABRCKV1" if BOARD_OPENCELLULAR_SUPABRCKV1
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config VARIANT_DIR
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string
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default "rotundu" if BOARD_OPENCELLULAR_ROTUNDU
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@ -67,11 +82,16 @@ config FSP_LOC
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hex
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default 0xfffb0000
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# FIXME: Slow boot performance when increasing CBFS_SIZE beyond 8MB?
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config FMDFILE
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string
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depends on VBOOT
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default "src/mainboard/$(CONFIG_MAINBOARD_DIR)/vboot-8M.fmd" if BOARD_ROMSIZE_KB_8192
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default "src/mainboard/$(CONFIG_MAINBOARD_DIR)/vboot-16M.fmd" if BOARD_ROMSIZE_KB_16384
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config CBFS_SIZE
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hex
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default 0x00200000 if BOARD_ROMSIZE_KB_8192
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default 0x00800000
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default 0x00140000 if BOARD_ROMSIZE_KB_8192
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default 0x003effc0 if BOARD_ROMSIZE_KB_16384
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config VIRTUAL_ROM_SIZE
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hex
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@ -0,0 +1,30 @@
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FLASH 16M {
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SI_ALL@0x0 0x300000 {
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SI_DESC@0x0 0x1000
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SI_ME@0x1000 0x2ff000
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}
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SI_BIOS@0x300000 0xd00000 {
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RW_SECTION_B@0x0 0x400000 {
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VBLOCK_B@0x0 0x10000
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FW_MAIN_B(CBFS)@0x10000 0x3effc0
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RW_FWID_B@0x3fffc0 0x40
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}
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RW_SECTION_A@0x400000 0x400000 {
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VBLOCK_A@0x0 0x10000
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FW_MAIN_A(CBFS)@0x10000 0x3effc0
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RW_FWID_A@0x3fffc0 0x40
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}
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RW_MRC_CACHE@0x800000 0x10000
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RW_VPD@0x810000 0x2000
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WP_RO@0x812000 0x4ee000 {
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RO_VPD@0x0 0x4000
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RO_SECTION@0x4000 0x4ea000 {
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FMAP@0x0 0x800
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RO_FRID@0x800 0x40
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RO_FRID_PAD@0x840 0x7c0
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GBB@0x1000 0xef000
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COREBOOT(CBFS)@0xf0000 0x3fa000
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}
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}
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}
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}
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@ -0,0 +1,30 @@
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FLASH 8M {
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SI_ALL@0x0 0x300000 {
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SI_DESC@0x0 0x1000
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SI_ME@0x1000 0x2ff000
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}
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SI_BIOS@0x300000 0x500000 {
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RW_SECTION_B@0x0 0x150040 {
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VBLOCK_B@0x0 0x10000
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FW_MAIN_B(CBFS)@0x10000 0x140000
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RW_FWID_B@0x150000 0x40
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}
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RW_SECTION_A@0x150040 0x150040 {
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VBLOCK_A@0x0 0x10000
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FW_MAIN_A(CBFS)@0x10000 0x140000
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RW_FWID_A@0x150000 0x40
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}
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RW_MRC_CACHE@0x2a0080 0x10000
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RW_VPD@0x2b0080 0x2000
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WP_RO@0x2b2080 0x24df80 {
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RO_VPD@0x0 0x4000
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RO_SECTION@0x4000 0x249f80 {
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FMAP@0x0 0x800
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RO_FRID@0x800 0x40
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RO_FRID_PAD@0x840 0x7c0
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GBB@0x1000 0xef000
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COREBOOT(CBFS)@0xf0000 0x159f80
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}
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}
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}
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}
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