arch/x86: Add register_new_ioapic()
Using this I/O APIC IDs will be assigned incrementally in the order of calling. I/O APIC ID #0 is reserved for the I/O APIC delivering GSI #0. Change-Id: I6493dc3b4fa542e81f80bb0355eac6dad30b93ec Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55313 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
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@ -37,6 +37,8 @@ void ioapic_set_max_vectors(void *ioapic_base, int mre_count);
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void ioapic_lock_max_vectors(void *ioapic_base);
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void setup_ioapic(void *ioapic_base, u8 ioapic_id);
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void register_new_ioapic(void *ioapic_base);
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void register_new_ioapic_gsi0(void *ioapic_base);
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void ioapic_set_boot_config(void *ioapic_base, bool irq_on_fsb);
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#endif
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@ -163,3 +163,16 @@ void setup_ioapic(void *ioapic_base, u8 ioapic_id)
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clear_vectors(ioapic_base, 0, ioapic_get_max_vectors(ioapic_base) - 1);
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route_i8259_irq0(ioapic_base);
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}
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void register_new_ioapic_gsi0(void *ioapic_base)
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{
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setup_ioapic(ioapic_base, 0);
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}
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void register_new_ioapic(void *ioapic_base)
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{
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static u8 ioapic_id;
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ioapic_id++;
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set_ioapic_id(ioapic_base, ioapic_id);
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clear_vectors(ioapic_base, 0, ioapic_get_max_vectors(ioapic_base) - 1);
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}
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