mb/siemens/mc_ehl4: Make DRAM population depending on GPIO GPP_B5

GPIO GPP_B5 is used as input on this mainboard. For a full-populated
DRAM configuration, the input signal is connected to ground and for a
half-populated configuration it is connected to 3.3 V.

BUG=none
TEST=Use different HW configurations and check coreboot log

GPP_B5 = 0:
[DEBUG]  2 DIMMs found

GPP_B5 = 1:
[INFO ]  meminit_channels: DRAM half-populated
[DEBUG]  1 DIMMs found

Change-Id: I48b4a3bea7f1ff804b78b7c648a7ea1925627b8a
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76245
Reviewed-by: Jan Samek <jan.samek@siemens.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
This commit is contained in:
Mario Scheithauer 2023-07-04 15:41:35 +02:00 committed by Felix Held
parent 81fb981e8e
commit 0ec7a9f174
2 changed files with 9 additions and 0 deletions

View File

@ -118,6 +118,7 @@ static const struct pad_config gpio_table[] = {
/* Early pad configuration in bootblock */
static const struct pad_config early_gpio_table[] = {
PAD_CFG_GPI(GPP_B5, NONE, DEEP), /* DRAM population */
PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1), /* SMB_CLK */
PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1), /* SMB_DATA */
PAD_CFG_NF(GPP_C2, NONE, DEEP, NF2), /* SMB_ALERT_N */

View File

@ -57,3 +57,11 @@ const struct mb_cfg *variant_memcfg_config(void)
{
return &mc_ehl_lpddr4x_memcfg_cfg;
}
bool half_populated(void)
{
/* There are two different memory expansion variants of this mainboard.
The GPIO GPP_B5 indicates whether the mainboard is equipped with half- or
full-populated DRAM. */
return gpio_get(GPP_B5);
}