src: Use 'include <boot/coreboot_tables.h>' when appropriate

Change-Id: I3d90e46ed391ce323436750c866a0afc3879e2e6
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36359
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/device/oprom/yabel/vbe.c

@@ -32,6 +32,7 @@
  *     IBM Corporation - initial implementation
  *****************************************************************************/
 
+#include <boot/coreboot_tables.h>
 #include <string.h>
 #include <types.h>
 

src/drivers/emulation/qemu/bochs.c

@@ -15,7 +15,6 @@
 #include <edid.h>
 #include <stdlib.h>
 #include <arch/io.h>
-#include <boot/coreboot_tables.h>
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pci.h>

src/drivers/emulation/qemu/cirrus.c

@@ -15,7 +15,6 @@
 #include <stdint.h>
 #include <edid.h>
 #include <stdlib.h>
-#include <boot/coreboot_tables.h>
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pci.h>

src/drivers/intel/fsp2_0/graphics.c

@@ -12,6 +12,7 @@
  * GNU General Public License for more details.
  */
 
+#include <boot/coreboot_tables.h>
 #include <console/console.h>
 #include <fsp/util.h>
 #include <soc/intel/common/vbt.h>

src/drivers/intel/gma/intel_ddi.c

@@ -32,7 +32,6 @@
 #include <device/pci_def.h>
 #include <console/console.h>
 #include <arch/acpi.h>
-#include <boot/coreboot_tables.h>
 #include <smbios.h>
 #include <device/pci.h>
 #include <ec/google/chromeec/ec.h>

src/drivers/pc80/rtc/mc146818rtc.c

@@ -18,7 +18,6 @@
 #include <version.h>
 #include <console/console.h>
 #include <pc80/mc146818rtc.h>
-#include <boot/coreboot_tables.h>
 #include <rtc.h>
 #include <string.h>
 #include <cbfs.h>

src/drivers/spi/spi_flash.c

@@ -15,6 +15,7 @@
 #include <arch/early_variables.h>
 #include <assert.h>
 #include <boot_device.h>
+#include <boot/coreboot_tables.h>
 #include <console/console.h>
 #include <cpu/x86/smm.h>
 #include <stdlib.h>

src/drivers/uart/oxpcie_early.c

@@ -15,7 +15,6 @@
 #include <stddef.h>
 #include <device/pci_ops.h>
 #include <arch/early_variables.h>
-#include <boot/coreboot_tables.h>
 #include <console/uart.h>
 #include <device/pci.h>
 #include <device/pci_def.h>

src/drivers/xgi/common/xgi_coreboot.h

@@ -20,6 +20,7 @@
 #include <stdlib.h>
 #include <stdint.h>
 #include <arch/io.h>
+#include <boot/coreboot_tables.h>
 #include <delay.h>
 #include <device/mmio.h>
 #include <console/console.h>

src/include/boot/tables.h

@@ -1,7 +1,7 @@
 #ifndef BOOT_TABLES_H
 #define BOOT_TABLES_H
 
-#include <boot/coreboot_tables.h>
+#include <stdint.h>
 
 /*
  * Write architecture specific tables as well as the common

src/include/vbe.h

@@ -13,7 +13,8 @@
 #ifndef VBE_H
 #define VBE_H
 
-#include <boot/coreboot_tables.h>
+#include <stdint.h>
+
 // these structs are for input from and output to OF
 typedef struct {
 	u8 display_type;	// 0 = NONE, 1 = analog, 2 = digital

src/lib/edid.c

@@ -36,7 +36,6 @@
 #include <string.h>
 #include <stdlib.h>
 #include <edid.h>
-#include <boot/coreboot_tables.h>
 #include <vbe.h>
 
 struct edid_context {

src/lib/imd_cbmem.c

@@ -13,6 +13,7 @@
  * GNU General Public License for more details.
  */
 
+#include <boot/coreboot_tables.h>
 #include <bootstate.h>
 #include <bootmem.h>
 #include <console/console.h>

src/mainboard/emulation/spike-riscv/uart.c

@@ -15,7 +15,6 @@
 
 #include <types.h>
 #include <console/uart.h>
-#include <boot/coreboot_tables.h>
 
 uintptr_t uart_platform_base(int idx)
 {

src/mainboard/google/beltino/mainboard.c

@@ -17,7 +17,6 @@
 #include <types.h>
 #include <arch/acpi.h>
 #include <arch/io.h>
-#include <boot/coreboot_tables.h>
 #include <device/device.h>
 #include <device/pci_def.h>
 #include <southbridge/intel/lynxpoint/pch.h>

src/mainboard/google/butterfly/mainboard.c

@@ -24,7 +24,6 @@
 #include <fmap.h>
 #include <arch/acpi.h>
 #include <arch/io.h>
-#include <boot/coreboot_tables.h>
 #include "onboard.h"
 #include "ec.h"
 #include <southbridge/intel/bd82x6x/pch.h>

src/mainboard/google/foster/mainboard.c

@@ -15,7 +15,6 @@
  */
 
 #include <arch/mmu.h>
-#include <boot/coreboot_tables.h>
 #include <device/device.h>
 #include <memrange.h>
 #include <soc/addressmap.h>

src/mainboard/google/link/mainboard.c

@@ -25,7 +25,6 @@
 #include <arch/acpi.h>
 #include <arch/io.h>
 #include <arch/interrupt.h>
-#include <boot/coreboot_tables.h>
 #include "onboard.h"
 #include "ec.h"
 #include <southbridge/intel/bd82x6x/pch.h>

src/mainboard/google/oak/mainboard.c

@@ -15,7 +15,6 @@
 
 #include <arch/cache.h>
 #include <boardid.h>
-#include <boot/coreboot_tables.h>
 #include <bootmode.h>
 #include <console/console.h>
 #include <delay.h>

src/mainboard/google/parrot/mainboard.c

@@ -20,7 +20,6 @@
 #include <drivers/intel/gma/int15.h>
 #include <arch/acpi.h>
 #include <arch/io.h>
-#include <boot/coreboot_tables.h>
 #include "onboard.h"
 #include "ec.h"
 #include <southbridge/intel/bd82x6x/pch.h>

src/mainboard/google/rambi/mainboard.c

@@ -23,7 +23,6 @@
 #endif
 #include <arch/acpi.h>
 #include <arch/interrupt.h>
-#include <boot/coreboot_tables.h>
 #include <smbios.h>
 #include "ec.h"
 #include <variant/onboard.h>

src/mainboard/google/slippy/mainboard.c

@@ -21,7 +21,6 @@
 #include <drivers/intel/gma/int15.h>
 #include <arch/acpi.h>
 #include <arch/io.h>
-#include <boot/coreboot_tables.h>
 #include <southbridge/intel/lynxpoint/pch.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 #include "ec.h"

src/mainboard/google/stout/mainboard.c

@@ -20,7 +20,6 @@
 #include <device/pci_ops.h>
 #include <drivers/intel/gma/int15.h>
 #include <arch/acpi.h>
-#include <boot/coreboot_tables.h>
 #include <southbridge/intel/bd82x6x/pch.h>
 #include <device/pci.h>
 #include <ec/quanta/it8518/ec.h>

src/mainboard/intel/baskingridge/mainboard.c

@@ -20,7 +20,6 @@
 #include <drivers/intel/gma/int15.h>
 #include <arch/acpi.h>
 #include <arch/io.h>
-#include <boot/coreboot_tables.h>
 #include <southbridge/intel/lynxpoint/pch.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 

src/mainboard/intel/bayleybay_fsp/mainboard.c

@@ -20,7 +20,6 @@
 #if CONFIG(VGA_ROM_RUN)
 #include <x86emu/x86emu.h>
 #endif
-#include <boot/coreboot_tables.h>
 
 /*
  * mainboard_enable is executed as first thing after enumerate_buses().

src/mainboard/intel/camelbackmountain_fsp/mainboard.c

@@ -20,7 +20,6 @@
 #if CONFIG(VGA_ROM_RUN)
 #include <x86emu/x86emu.h>
 #endif
-#include <boot/coreboot_tables.h>
 
 /*
  * mainboard_enable is executed as first thing after enumerate_buses().

src/mainboard/intel/emeraldlake2/mainboard.c

@@ -19,7 +19,6 @@
 #include <device/pci_def.h>
 #include <drivers/intel/gma/int15.h>
 #include <arch/acpi.h>
-#include <boot/coreboot_tables.h>
 #include <southbridge/intel/bd82x6x/pch.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 

src/mainboard/intel/wtm2/mainboard.c

@@ -20,7 +20,6 @@
 #include <drivers/intel/gma/int15.h>
 #include <arch/acpi.h>
 #include <arch/io.h>
-#include <boot/coreboot_tables.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
 void mainboard_suspend_resume(void)

src/mainboard/kontron/ktqm77/mainboard.c

@@ -24,7 +24,6 @@
 #endif
 #include <pc80/mc146818rtc.h>
 #include <arch/interrupt.h>
-#include <boot/coreboot_tables.h>
 #include <southbridge/intel/bd82x6x/pch.h>
 
 #if CONFIG(VGA_ROM_RUN)

src/mainboard/samsung/lumpy/mainboard.c

@@ -20,7 +20,6 @@
 #include <device/pci_def.h>
 #include <drivers/intel/gma/int15.h>
 #include <arch/acpi.h>
-#include <boot/coreboot_tables.h>
 #include <ec/smsc/mec1308/ec.h>
 #include "ec.h"
 #include "onboard.h"

src/mainboard/siemens/mc_bdx1/mainboard.c

@@ -27,7 +27,6 @@
 #include <x86emu/x86emu.h>
 #endif
 #include <device/mmio.h>
-#include <boot/coreboot_tables.h>
 #include <hwilib.h>
 #include <i210.h>
 #include <soc/pci_devs.h>

src/mainboard/siemens/mc_tcu3/mainboard.c

@@ -21,7 +21,6 @@
 #if CONFIG(VGA_ROM_RUN)
 #include <x86emu/x86emu.h>
 #endif
-#include <boot/coreboot_tables.h>
 #include <hwilib.h>
 #include <i210.h>
 #include "lcd_panel.h"

src/security/vboot/vboot_common.c

@@ -13,7 +13,6 @@
  * GNU General Public License for more details.
  */
 
-#include <boot/coreboot_tables.h>
 #include <boot_device.h>
 #include <cbmem.h>
 #include <console/cbmem_console.h>

src/soc/nvidia/tegra210/mtc.c

@@ -13,6 +13,7 @@
  * GNU General Public License for more details.
  */
 
+#include <boot/coreboot_tables.h>
 #include <cbfs.h>
 #include <cbmem.h>
 #include <console/console.h>