drivers/intel/fsp2_0: Fix the FSP-T position

The only use case for FSP-T in coreboot is for 'Intel Bootguard'
support at the moment. Bootguard can do verification FSP-T but there
is no verification on whether the FSP found by walkcbfs_asm is the one
actually verified as an IBB by Bootguard. A fixed pointer needs to be
used.

TESTED on OCP/Deltalake, still boots.

Change-Id: I1ec8b238384684dccf39e5da902d426d3a32b9db
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52850
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>

src/drivers/intel/fsp2_0/Kconfig

@@ -74,6 +74,12 @@ config FSP_T_CBFS
 	depends on FSP_CAR
 	default "fspt.bin"
 
+config FSP_T_LOCATION
+	hex
+	default 0xfffe0000
+	help
+	  The location for FSP-T.
+
 config FSP_S_CBFS
 	string "Name of FSP-S in CBFS"
 	default "fsps.bin"

src/drivers/intel/fsp2_0/Makefile.inc

@@ -48,6 +48,7 @@ $(FSP_T_CBFS)-file := $(call strip_quotes,$(CONFIG_FSP_T_FILE))
 $(FSP_T_CBFS)-type := fsp
 ifeq ($(CONFIG_FSP_T_XIP),y)
 $(FSP_T_CBFS)-options := --xip $(TXTIBB)
+$(FSP_T_CBFS)-position = $(CONFIG_FSP_T_LOCATION)
 endif
 
 cbfs-files-$(CONFIG_ADD_FSP_BINARIES) += $(FSP_M_CBFS)

src/soc/intel/common/block/cpu/car/cache_as_ram_fsp.S

@@ -21,16 +21,7 @@ bootblock_pre_c_entry:
 cache_as_ram:
 	post_code(0x21)
 
-	/* find fsp in cbfs */
-	lea	fsp_name, %esi
-	mov	$1f, %esp
-	jmp	walkcbfs_asm
-1:
-	cmp	$0, %eax
-	jz	.halt_forever
-	mov	CBFS_FILE_OFFSET(%eax), %ebx
-	bswap	%ebx
-	add	%eax, %ebx
+	movl	$(CONFIG_FSP_T_LOCATION), %ebx
 	add	$0x94, %ebx
 
 	/*