mb/google/rex: Add RTD3 support for discrete wifi module
BUG=none TEST=Build and boot to the OS on google/rex. Signed-off-by: Kapil Porwal <kapilporwal@google.com> Change-Id: I2c5bac880e7dbc2ec14376c5cee3c13363bab377 Reviewed-on: https://review.coreboot.org/c/coreboot/+/70444 Reviewed-by: Nick Vaccaro <nvaccaro@google.com> Reviewed-by: Subrata Banik <subratabanik@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -239,8 +239,8 @@ static const struct pad_config gpio_table[] = {
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PAD_NC(GPP_E16, NONE),
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PAD_NC(GPP_E16, NONE),
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/* GPP_E17 : [] ==> EN_HPS_PWR */
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/* GPP_E17 : [] ==> EN_HPS_PWR */
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PAD_CFG_GPO(GPP_E17, 1, DEEP),
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PAD_CFG_GPO(GPP_E17, 1, DEEP),
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/* GPP_E22 : net EN_PP3300_WLAN is not present in the given design */
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/* GPP_E22 : [] ==> EN_PP3300_WLAN */
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PAD_NC(GPP_E22, NONE),
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PAD_CFG_GPO(GPP_E22, 1, DEEP),
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/* GPP_F00 : [] ==> CNV_BRI_DT_R */
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/* GPP_F00 : [] ==> CNV_BRI_DT_R */
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PAD_CFG_NF(GPP_F00, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_F00, NONE, DEEP, NF1),
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@ -260,8 +260,8 @@ static const struct pad_config gpio_table[] = {
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PAD_CFG_GPO(GPP_F07, 0, DEEP),
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PAD_CFG_GPO(GPP_F07, 0, DEEP),
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/* GPP_F08 : [] ==> WLAN_PERST_L */
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/* GPP_F08 : [] ==> WLAN_PERST_L */
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PAD_CFG_GPO(GPP_F08, 1, DEEP),
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PAD_CFG_GPO(GPP_F08, 1, DEEP),
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/* GPP_F09 : [] ==> EN_PP3300_WLAN */
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/* GPP_F09 : [] ==> WLAN_PE_WAKE_ODL */
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PAD_CFG_GPO(GPP_F09, 1, DEEP),
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PAD_CFG_GPI_IRQ_WAKE(GPP_F09, NONE, PLTRST, LEVEL, INVERT),
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/* GPP_F10 : [] ==> WWAN_PCIE_WAKE_ODL */
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/* GPP_F10 : [] ==> WWAN_PCIE_WAKE_ODL */
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PAD_CFG_GPI_IRQ_WAKE(GPP_F10, NONE, PLTRST, LEVEL, INVERT),
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PAD_CFG_GPI_IRQ_WAKE(GPP_F10, NONE, PLTRST, LEVEL, INVERT),
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/* GPP_F11 : GSP1_SOC_CLK_R */
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/* GPP_F11 : GSP1_SOC_CLK_R */
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@ -435,6 +435,17 @@ chip soc/intel/meteorlake
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.clk_req = 5,
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.clk_req = 5,
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.flags = PCIE_RP_HOTPLUG | PCIE_RP_LTR | PCIE_RP_AER,
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.flags = PCIE_RP_HOTPLUG | PCIE_RP_LTR | PCIE_RP_AER,
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}"
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}"
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chip drivers/wifi/generic
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register "wake" = "GPE0_DW2_09"
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register "add_acpi_dma_property" = "true"
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device pci 00.0 on end
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end
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chip soc/intel/common/block/pcie/rtd3
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register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E22)"
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register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_F08)"
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register "srcclk_pin" = "5"
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device generic 0 on end
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end
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end #PCIE5 WLAN card
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end #PCIE5 WLAN card
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device ref pcie_rp6 on
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device ref pcie_rp6 on
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probe CELLULAR CELLULAR_PCIE
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probe CELLULAR CELLULAR_PCIE
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