mb/google/rex: Add RTD3 support for discrete wifi module

BUG=none
TEST=Build and boot to the OS on google/rex.

Signed-off-by: Kapil Porwal <kapilporwal@google.com>
Change-Id: I2c5bac880e7dbc2ec14376c5cee3c13363bab377
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70444
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Kapil Porwal 2022-12-07 13:53:43 +05:30 committed by Subrata Banik
parent dee52d962d
commit 0f15030700
2 changed files with 15 additions and 4 deletions

View File

@ -239,8 +239,8 @@ static const struct pad_config gpio_table[] = {
PAD_NC(GPP_E16, NONE), PAD_NC(GPP_E16, NONE),
/* GPP_E17 : [] ==> EN_HPS_PWR */ /* GPP_E17 : [] ==> EN_HPS_PWR */
PAD_CFG_GPO(GPP_E17, 1, DEEP), PAD_CFG_GPO(GPP_E17, 1, DEEP),
/* GPP_E22 : net EN_PP3300_WLAN is not present in the given design */ /* GPP_E22 : [] ==> EN_PP3300_WLAN */
PAD_NC(GPP_E22, NONE), PAD_CFG_GPO(GPP_E22, 1, DEEP),
/* GPP_F00 : [] ==> CNV_BRI_DT_R */ /* GPP_F00 : [] ==> CNV_BRI_DT_R */
PAD_CFG_NF(GPP_F00, NONE, DEEP, NF1), PAD_CFG_NF(GPP_F00, NONE, DEEP, NF1),
@ -260,8 +260,8 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_GPO(GPP_F07, 0, DEEP), PAD_CFG_GPO(GPP_F07, 0, DEEP),
/* GPP_F08 : [] ==> WLAN_PERST_L */ /* GPP_F08 : [] ==> WLAN_PERST_L */
PAD_CFG_GPO(GPP_F08, 1, DEEP), PAD_CFG_GPO(GPP_F08, 1, DEEP),
/* GPP_F09 : [] ==> EN_PP3300_WLAN */ /* GPP_F09 : [] ==> WLAN_PE_WAKE_ODL */
PAD_CFG_GPO(GPP_F09, 1, DEEP), PAD_CFG_GPI_IRQ_WAKE(GPP_F09, NONE, PLTRST, LEVEL, INVERT),
/* GPP_F10 : [] ==> WWAN_PCIE_WAKE_ODL */ /* GPP_F10 : [] ==> WWAN_PCIE_WAKE_ODL */
PAD_CFG_GPI_IRQ_WAKE(GPP_F10, NONE, PLTRST, LEVEL, INVERT), PAD_CFG_GPI_IRQ_WAKE(GPP_F10, NONE, PLTRST, LEVEL, INVERT),
/* GPP_F11 : GSP1_SOC_CLK_R */ /* GPP_F11 : GSP1_SOC_CLK_R */

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@ -435,6 +435,17 @@ chip soc/intel/meteorlake
.clk_req = 5, .clk_req = 5,
.flags = PCIE_RP_HOTPLUG | PCIE_RP_LTR | PCIE_RP_AER, .flags = PCIE_RP_HOTPLUG | PCIE_RP_LTR | PCIE_RP_AER,
}" }"
chip drivers/wifi/generic
register "wake" = "GPE0_DW2_09"
register "add_acpi_dma_property" = "true"
device pci 00.0 on end
end
chip soc/intel/common/block/pcie/rtd3
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E22)"
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_F08)"
register "srcclk_pin" = "5"
device generic 0 on end
end
end #PCIE5 WLAN card end #PCIE5 WLAN card
device ref pcie_rp6 on device ref pcie_rp6 on
probe CELLULAR CELLULAR_PCIE probe CELLULAR CELLULAR_PCIE