mb/google/brya/var/gimble: Include SPD for MT53E1G32D2NP-046 WT:A and K4U6E3S4AA-MGCR

Add SPD support to gimble for LPDDR4 memory part MT53E1G32D2NP-046 WT:A and K4U6E3S4AA-MGCR.

BUG=b:191574298
TEST=USE="project_gimble emerge-brya coreboot" and verify it builds without error.

Signed-off-by: Mark Hsieh <mark_hsieh@wistron.corp-partner.google.com>
Change-Id: I4bfc18fd42c6ff2675e6f836c2ecc9617fac3aff
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56329
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Caveh Jalali <caveh@chromium.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Mark Hsieh 2021-07-15 16:02:39 +08:00 committed by Patrick Georgi
parent 1412ffab19
commit 0f306e8883
3 changed files with 6 additions and 1 deletions

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@ -2,5 +2,6 @@
## This is an auto-generated file. Do not edit!!
SPD_SOURCES =
SPD_SOURCES += lp4x-spd-1.hex # ID = 0(0b0000) Parts = MT53E512M32D2NP-046 WT:E, H9HCNNNBKMMLXR-NEE
SPD_SOURCES += lp4x-spd-1.hex # ID = 0(0b0000) Parts = MT53E512M32D2NP-046 WT:E, H9HCNNNBKMMLXR-NEE, K4U6E3S4AA-MGCR
SPD_SOURCES += lp4x-spd-3.hex # ID = 1(0b0001) Parts = H9HCNNNCPMMLXR-NEE
SPD_SOURCES += lp4x-spd-4.hex # ID = 2(0b0010) Parts = MT53E1G32D2NP-046 WT:A

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@ -2,3 +2,5 @@ DRAM Part Name ID to assign
MT53E512M32D2NP-046 WT:E 0 (0000)
H9HCNNNCPMMLXR-NEE 1 (0001)
H9HCNNNBKMMLXR-NEE 0 (0000)
MT53E1G32D2NP-046 WT:A 2 (0010)
K4U6E3S4AA-MGCR 0 (0000)

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@ -1,3 +1,5 @@
MT53E512M32D2NP-046 WT:E
H9HCNNNCPMMLXR-NEE
H9HCNNNBKMMLXR-NEE
MT53E1G32D2NP-046 WT:A
K4U6E3S4AA-MGCR