soc/amd: Move southbridge_write_acpi_tables

This is common between all the chipsets.

It's also required by common/block/lpc/lpc.c.

Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I361dfabfe0c04667a2c112955133831a985d5cc0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50509
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>

src/soc/amd/common/block/acpi/Makefile.inc

@@ -8,5 +8,6 @@ postcar-y += acpi.c
 smm-y += acpi.c
 
 ramstage-y += pm_state.c
+ramstage-y += tables.c
 
 endif # CONFIG_SOC_AMD_COMMON_BLOCK_ACPI

src/soc/amd/common/block/acpi/tables.c

@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <acpi/acpi.h>
+#include <amdblocks/acpi.h>
+#include <device/device.h>
+#include <types.h>
+
+unsigned long southbridge_write_acpi_tables(const struct device *device,
+		unsigned long current,
+		struct acpi_rsdp *rsdp)
+{
+	return acpi_write_hpet(device, current, rsdp);
+}

src/soc/amd/common/block/include/amdblocks/acpi.h

@@ -3,8 +3,9 @@
 #ifndef AMD_BLOCK_ACPI_H
 #define AMD_BLOCK_ACPI_H
 
-#include <types.h>
+#include <acpi/acpi.h>
 #include <amdblocks/gpio_banks.h>
+#include <types.h>
 
 /* ACPI MMIO registers 0xfed80800 */
 #define MMIO_ACPI_PM1_STS		0x00
@@ -47,4 +48,7 @@ struct chipset_power_state {
 	struct gpio_wake_state gpio_state;
 };
 
+unsigned long southbridge_write_acpi_tables(const struct device *device, unsigned long current,
+					    struct acpi_rsdp *rsdp);
+
 #endif /* AMD_BLOCK_ACPI_H */

src/soc/amd/common/block/lpc/lpc.c

@@ -12,10 +12,10 @@
 #include <arch/ioapic.h>
 #include <pc80/i8254.h>
 #include <pc80/i8259.h>
+#include <amdblocks/acpi.h>
 #include <amdblocks/acpimmio.h>
 #include <amdblocks/espi.h>
 #include <amdblocks/lpc.h>
-#include <soc/acpi.h>
 #include <soc/iomap.h>
 #include <soc/lpc.h>
 #include <soc/southbridge.h>

src/soc/amd/picasso/acpi.c

@@ -390,13 +390,6 @@ void generate_cpu_entries(const struct device *device)
 	acpigen_pop_len();
 }
 
-unsigned long southbridge_write_acpi_tables(const struct device *device,
-		unsigned long current,
-		struct acpi_rsdp *rsdp)
-{
-	return acpi_write_hpet(device, current, rsdp);
-}
-
 void soc_fill_gnvs(struct global_nvs *gnvs)
 {
 	/* Set unknown wake source */

src/soc/amd/picasso/include/soc/acpi.h

@@ -8,9 +8,6 @@
 #include <device/device.h>
 #include <stdint.h>
 
-unsigned long southbridge_write_acpi_tables(const struct device *device,
-		unsigned long current, struct acpi_rsdp *rsdp);
-
 uintptr_t agesa_write_acpi_tables(const struct device *device, uintptr_t current,
 				  acpi_rsdp_t *rsdp);
 

src/soc/amd/stoneyridge/acpi.c

@@ -158,13 +158,6 @@ void generate_cpu_entries(const struct device *device)
 	acpigen_pop_len();
 }
 
-unsigned long southbridge_write_acpi_tables(const struct device *device,
-		unsigned long current,
-		struct acpi_rsdp *rsdp)
-{
-	return acpi_write_hpet(device, current, rsdp);
-}
-
 void soc_fill_gnvs(struct global_nvs *gnvs)
 {
 	/* Set unknown wake source */

src/soc/amd/stoneyridge/include/soc/acpi.h

@@ -12,9 +12,6 @@
 	#define FADT_BOOT_ARCH (ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042)
 #endif
 
-unsigned long southbridge_write_acpi_tables(const struct device *device,
-		unsigned long current, struct acpi_rsdp *rsdp);
-
 const char *soc_acpi_name(const struct device *dev);
 
 #endif /* AMD_STONEYRIDGE_ACPI_H */