new
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1303 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
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# Sample config file for
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# the Tyan s2850
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# This will make a target directory of ./s2850
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loadoptions
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target s2850
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uses ARCH
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uses CONFIG_COMPRESS
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uses CONFIG_IOAPIC
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uses CONFIG_ROM_STREAM
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uses CONFIG_ROM_STREAM_START
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uses CONFIG_SMP
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uses CONFIG_UDELAY_TSC
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uses CPU_FIXUP
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uses FALLBACK_SIZE
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uses HAVE_FALLBACK_BOOT
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uses HAVE_MP_TABLE
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uses HAVE_PIRQ_TABLE
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uses i586
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uses i686
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uses INTEL_PPRO_MTRR
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uses HEAP_SIZE
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uses IRQ_SLOT_COUNT
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uses k7
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uses k8
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uses MAINBOARD
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uses MAINBOARD_PART_NUMBER
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uses MAINBOARD_VENDOR
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#uses MEMORY_HOLE
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uses PAYLOAD_SIZE
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uses _RAMBASE
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uses _ROMBASE
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uses ROM_IMAGE_SIZE
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uses ROM_SECTION_OFFSET
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uses ROM_SECTION_SIZE
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uses ROM_SIZE
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uses STACK_SIZE
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uses USE_FALLBACK_IMAGE
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uses USE_OPTION_TABLE
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uses HAVE_OPTION_TABLE
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uses CONFIG_CHIP_CONFIGURE
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uses CONFIG_CONSOLE_SERIAL8250
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uses TTYS0_BAUD
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uses DEFAULT_CONSOLE_LOGLEVEL
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uses MAXIMUM_CONSOLE_LOGLEVEL
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uses DEBUG
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uses CONFIG_MAX_CPUS
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uses CONFIG_LOGICAL_CPUS
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uses CONFIG_MAX_PHYSICAL_CPUS
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uses LINUXBIOS_EXTRA_VERSION
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uses XIP_ROM_SIZE
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uses XIP_ROM_BASE
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uses HAVE_HARD_RESET
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#uses CONFIG_VGABIOS
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#uses CONFIG_REALMODE_IDT
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#uses CONFIG_PCIBIOS
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#uses VGABIOS_START
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#uses SCSIFW_START
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#
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#uses CONFIG_LSI_SCSI_FW_FIXUP
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option HAVE_HARD_RESET=0
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option HAVE_OPTION_TABLE=1
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option HAVE_MP_TABLE=1
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option CPU_FIXUP=1
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option CONFIG_UDELAY_TSC=0
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option i686=1
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option i586=1
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option INTEL_PPRO_MTRR=1
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option k7=1
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option k8=1
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option ROM_SIZE=524288
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#option CONFIG_VGABIOS=0
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#option CONFIG_REALMODE_IDT=0
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#option CONFIG_PCIBIOS=0
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#option VGABIOS_START=0xfff8c000
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#option SCSIFW_START=0xfff80000
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option HAVE_FALLBACK_BOOT=1
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# use the new chip configure code.
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option CONFIG_CHIP_CONFIGURE=1
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#option CONFIG_LSI_SCSI_FW_FIXUP=1
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#
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###
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### Build code to export a programmable irq routing table
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###
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option HAVE_PIRQ_TABLE=1
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option IRQ_SLOT_COUNT=12
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#
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###
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### Build code for SMP support
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### Only worry about 2 micro processors
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###
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option CONFIG_SMP=1
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option CONFIG_MAX_CPUS=1
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option CONFIG_LOGICAL_CPUS=0
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option CONFIG_MAX_PHYSICAL_CPUS=1
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#
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###
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### Build code to setup a generic IOAPIC
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###
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option CONFIG_IOAPIC=1
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#
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###
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### MEMORY_HOLE instructs earlymtrr.inc to
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### enable caching from 0-640KB and to disable
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### caching from 640KB-1MB using fixed MTRRs
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###
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### Enabling this option breaks SMP because secondary
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### CPU identification depends on only variable MTRRs
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### being enabled.
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###
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#option MEMORY_HOLE=0
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#
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###
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### Clean up the motherboard id strings
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###
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option MAINBOARD_PART_NUMBER="S2850"
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option MAINBOARD_VENDOR="Tyan"
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#
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###
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### Compute the location and size of where this firmware image
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### (linuxBIOS plus bootloader) will live in the boot rom chip.
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###
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#option FALLBACK_SIZE=524288
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option FALLBACK_SIZE=98304
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## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy.
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option ROM_IMAGE_SIZE=65536
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###
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### Compute where this copy of linuxBIOS will start in the boot rom
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###
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#
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###
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## We do use compressed image
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option CONFIG_COMPRESS=1
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option CONFIG_CONSOLE_SERIAL8250=1
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option TTYS0_BAUD=115200
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##
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### Select the linuxBIOS loglevel
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##
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## EMERG 1 system is unusable
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## ALERT 2 action must be taken immediately
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## CRIT 3 critical conditions
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## ERR 4 error conditions
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## WARNING 5 warning conditions
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## NOTICE 6 normal but significant condition
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## INFO 7 informational
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## DEBUG 8 debug-level messages
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## SPEW 9 Way too many details
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## Request this level of debugging output
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option DEFAULT_CONSOLE_LOGLEVEL=8
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## At a maximum only compile in this level of debugging
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option MAXIMUM_CONSOLE_LOGLEVEL=9
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option DEBUG=1
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#
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## LinuxBIOS C code runs at this location in RAM
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option _RAMBASE=0x004000
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##
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## Use a 128K stack
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##
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option STACK_SIZE=0x4000
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##
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## Use a 256K heap
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##
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option HEAP_SIZE=0x8000
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#
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###
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### Compute the start location and size size of
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### The linuxBIOS bootloader.
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###
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option CONFIG_ROM_STREAM = 1
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#
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#
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romimage "normal"
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# 48K for SCSI FW
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# option ROM_SIZE = 475136
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# 48K for SCSI FW and 48K for ATI ROM
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# option ROM_SIZE = 425984
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option LINUXBIOS_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal"
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option USE_FALLBACK_IMAGE=0
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option ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE)
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option ROM_SECTION_OFFSET= 0
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option PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE)
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option CONFIG_ROM_STREAM_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
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option _ROMBASE = (CONFIG_ROM_STREAM_START + PAYLOAD_SIZE)
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option XIP_ROM_SIZE = FALLBACK_SIZE
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option XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE)
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mainboard tyan/s2850
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payload ../../tg3--ide_disk.zelf
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end
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romimage "fallback"
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option LINUXBIOS_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback"
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option USE_FALLBACK_IMAGE=1
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option ROM_SECTION_SIZE = FALLBACK_SIZE
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option ROM_SECTION_OFFSET= (ROM_SIZE - FALLBACK_SIZE)
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option PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE)
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option CONFIG_ROM_STREAM_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
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option _ROMBASE = (CONFIG_ROM_STREAM_START + PAYLOAD_SIZE)
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option XIP_ROM_SIZE = FALLBACK_SIZE
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option XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE)
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mainboard tyan/s2850
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payload ../../tg3--ide_disk.zelf
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end
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buildrom ./linuxbios.rom ROM_SIZE "normal" "fallback"
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@ -0,0 +1 @@
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2.0
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#!/bin/bash
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TYANMB=s2850
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cd "$TYANMB"
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make
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#cat ../atix.rom ./normal/linuxbios.rom ./fallback/linuxbios.rom > $TYANMB"_linuxbios.rom"
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cat ./normal/linuxbios.rom ./fallback/linuxbios.rom > $TYANMB"_linuxbios.rom"
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cp -f $TYANMB"_linuxbios.rom" /home/yhlu/
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@ -0,0 +1,239 @@
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# Sample config file for
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# the Tyan s2880
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# This will make a target directory of ./s2880
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loadoptions
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target s2881
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uses ARCH
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uses CONFIG_COMPRESS
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uses CONFIG_IOAPIC
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uses CONFIG_ROM_STREAM
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uses CONFIG_ROM_STREAM_START
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uses CONFIG_SMP
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uses CONFIG_UDELAY_TSC
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uses CPU_FIXUP
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uses FALLBACK_SIZE
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uses HAVE_FALLBACK_BOOT
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uses HAVE_MP_TABLE
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uses HAVE_PIRQ_TABLE
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uses i586
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uses i686
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uses INTEL_PPRO_MTRR
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uses HEAP_SIZE
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uses IRQ_SLOT_COUNT
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uses k7
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uses k8
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uses MAINBOARD
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uses MAINBOARD_PART_NUMBER
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uses MAINBOARD_VENDOR
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#uses MEMORY_HOLE
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uses PAYLOAD_SIZE
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uses _RAMBASE
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uses _ROMBASE
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uses ROM_IMAGE_SIZE
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uses ROM_SECTION_OFFSET
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uses ROM_SECTION_SIZE
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uses ROM_SIZE
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uses STACK_SIZE
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uses USE_FALLBACK_IMAGE
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uses USE_OPTION_TABLE
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uses HAVE_OPTION_TABLE
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uses CONFIG_CHIP_CONFIGURE
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uses CONFIG_CONSOLE_SERIAL8250
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uses TTYS0_BAUD
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uses DEFAULT_CONSOLE_LOGLEVEL
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uses MAXIMUM_CONSOLE_LOGLEVEL
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uses DEBUG
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uses CONFIG_MAX_CPUS
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uses CONFIG_LOGICAL_CPUS
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uses CONFIG_MAX_PHYSICAL_CPUS
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uses LINUXBIOS_EXTRA_VERSION
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uses XIP_ROM_SIZE
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uses XIP_ROM_BASE
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uses HAVE_HARD_RESET
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#uses CONFIG_VGABIOS
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#uses CONFIG_REALMODE_IDT
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#uses CONFIG_PCIBIOS
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#uses VGABIOS_START
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#uses SCSIFW_START
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#
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#uses CONFIG_LSI_SCSI_FW_FIXUP
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option HAVE_HARD_RESET=1
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option HAVE_OPTION_TABLE=1
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option HAVE_MP_TABLE=1
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option CPU_FIXUP=1
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option CONFIG_UDELAY_TSC=0
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option i686=1
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option i586=1
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option INTEL_PPRO_MTRR=1
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option k7=1
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option k8=1
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option ROM_SIZE=524288
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#option CONFIG_VGABIOS=0
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#option CONFIG_REALMODE_IDT=0
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#option CONFIG_PCIBIOS=0
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#option VGABIOS_START=0xfff8c000
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#option SCSIFW_START=0xfff80000
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option HAVE_FALLBACK_BOOT=1
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# use the new chip configure code.
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option CONFIG_CHIP_CONFIGURE=1
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#option CONFIG_LSI_SCSI_FW_FIXUP=1
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#
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###
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### Build code to export a programmable irq routing table
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###
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option HAVE_PIRQ_TABLE=1
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option IRQ_SLOT_COUNT=9
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#
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###
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### Build code for SMP support
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### Only worry about 2 micro processors
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###
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option CONFIG_SMP=1
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option CONFIG_MAX_CPUS=2
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option CONFIG_LOGICAL_CPUS=0
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option CONFIG_MAX_PHYSICAL_CPUS=2
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#
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###
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### Build code to setup a generic IOAPIC
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###
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option CONFIG_IOAPIC=1
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#
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||||
###
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||||
### MEMORY_HOLE instructs earlymtrr.inc to
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||||
### enable caching from 0-640KB and to disable
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||||
### caching from 640KB-1MB using fixed MTRRs
|
||||
###
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### Enabling this option breaks SMP because secondary
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### CPU identification depends on only variable MTRRs
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### being enabled.
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###
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#option MEMORY_HOLE=0
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#
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###
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### Clean up the motherboard id strings
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###
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option MAINBOARD_PART_NUMBER="S2881"
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option MAINBOARD_VENDOR="Tyan"
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#
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###
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### Compute the location and size of where this firmware image
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### (linuxBIOS plus bootloader) will live in the boot rom chip.
|
||||
###
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#option FALLBACK_SIZE=524288
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option FALLBACK_SIZE=98304
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## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy.
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option ROM_IMAGE_SIZE=65536
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###
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### Compute where this copy of linuxBIOS will start in the boot rom
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###
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#
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###
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||||
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## We do use compressed image
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option CONFIG_COMPRESS=1
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option CONFIG_CONSOLE_SERIAL8250=1
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option TTYS0_BAUD=115200
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##
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### Select the linuxBIOS loglevel
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##
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## EMERG 1 system is unusable
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## ALERT 2 action must be taken immediately
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## CRIT 3 critical conditions
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## ERR 4 error conditions
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## WARNING 5 warning conditions
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## NOTICE 6 normal but significant condition
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## INFO 7 informational
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## DEBUG 8 debug-level messages
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## SPEW 9 Way too many details
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||||
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## Request this level of debugging output
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option DEFAULT_CONSOLE_LOGLEVEL=8
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## At a maximum only compile in this level of debugging
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||||
option MAXIMUM_CONSOLE_LOGLEVEL=9
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option DEBUG=1
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#
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## LinuxBIOS C code runs at this location in RAM
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option _RAMBASE=0x004000
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##
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## Use a 128K stack
|
||||
##
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option STACK_SIZE=0x4000
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##
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## Use a 256K heap
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##
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option HEAP_SIZE=0x8000
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|
||||
#
|
||||
###
|
||||
### Compute the start location and size size of
|
||||
### The linuxBIOS bootloader.
|
||||
###
|
||||
option CONFIG_ROM_STREAM = 1
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||||
#
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#
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romimage "normal"
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# 48K for SCSI FW
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# option ROM_SIZE = 475136
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# 48K for SCSI FW and 48K for ATI ROM
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||||
# option ROM_SIZE = 425984
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option LINUXBIOS_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal"
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option USE_FALLBACK_IMAGE=0
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option ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE)
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option ROM_SECTION_OFFSET= 0
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option PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE)
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option CONFIG_ROM_STREAM_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
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option _ROMBASE = (CONFIG_ROM_STREAM_START + PAYLOAD_SIZE)
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option XIP_ROM_SIZE = FALLBACK_SIZE
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option XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE)
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||||
mainboard tyan/s2881
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payload ../../tg3--ide_disk.zelf
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end
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romimage "fallback"
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option LINUXBIOS_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback"
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option USE_FALLBACK_IMAGE=1
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option ROM_SECTION_SIZE = FALLBACK_SIZE
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option ROM_SECTION_OFFSET= (ROM_SIZE - FALLBACK_SIZE)
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option PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE)
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option CONFIG_ROM_STREAM_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
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option _ROMBASE = (CONFIG_ROM_STREAM_START + PAYLOAD_SIZE)
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option XIP_ROM_SIZE = FALLBACK_SIZE
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option XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE)
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mainboard tyan/s2881
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payload ../../tg3.zelf
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end
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buildrom ./linuxbios.rom ROM_SIZE "normal" "fallback"
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@ -0,0 +1 @@
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2.0
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@ -0,0 +1,8 @@
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#!/bin/bash
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TYANMB=s2881
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cd "$TYANMB"
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make
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#cat ../fwx.rom ../atix.rom ./normal/linuxbios.rom ./fallback/linuxbios.rom > $TYANMB"_linuxbios.rom"
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cat ../fwx.rom ./normal/linuxbios.rom ./fallback/linuxbios.rom > $TYANMB"_linuxbios.rom"
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#cat ./normal/linuxbios.rom ./fallback/linuxbios.rom > $TYANMB"_linuxbios.rom"
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cp -f $TYANMB"_linuxbios.rom" /home/yhlu/
|
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@ -0,0 +1,239 @@
|
|||
# Sample config file for
|
||||
# the Tyan s2880
|
||||
# This will make a target directory of ./s2880
|
||||
|
||||
loadoptions
|
||||
|
||||
target s4880
|
||||
|
||||
uses ARCH
|
||||
uses CONFIG_COMPRESS
|
||||
uses CONFIG_IOAPIC
|
||||
uses CONFIG_ROM_STREAM
|
||||
uses CONFIG_ROM_STREAM_START
|
||||
uses CONFIG_SMP
|
||||
uses CONFIG_UDELAY_TSC
|
||||
uses CPU_FIXUP
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||||
uses FALLBACK_SIZE
|
||||
uses HAVE_FALLBACK_BOOT
|
||||
uses HAVE_MP_TABLE
|
||||
uses HAVE_PIRQ_TABLE
|
||||
uses i586
|
||||
uses i686
|
||||
uses INTEL_PPRO_MTRR
|
||||
uses HEAP_SIZE
|
||||
uses IRQ_SLOT_COUNT
|
||||
uses k7
|
||||
uses k8
|
||||
uses MAINBOARD
|
||||
uses MAINBOARD_PART_NUMBER
|
||||
uses MAINBOARD_VENDOR
|
||||
#uses MEMORY_HOLE
|
||||
uses PAYLOAD_SIZE
|
||||
uses _RAMBASE
|
||||
uses _ROMBASE
|
||||
uses ROM_IMAGE_SIZE
|
||||
uses ROM_SECTION_OFFSET
|
||||
uses ROM_SECTION_SIZE
|
||||
uses ROM_SIZE
|
||||
uses STACK_SIZE
|
||||
uses USE_FALLBACK_IMAGE
|
||||
uses USE_OPTION_TABLE
|
||||
uses HAVE_OPTION_TABLE
|
||||
uses CONFIG_CHIP_CONFIGURE
|
||||
|
||||
uses CONFIG_CONSOLE_SERIAL8250
|
||||
uses TTYS0_BAUD
|
||||
uses DEFAULT_CONSOLE_LOGLEVEL
|
||||
uses MAXIMUM_CONSOLE_LOGLEVEL
|
||||
uses DEBUG
|
||||
uses CONFIG_MAX_CPUS
|
||||
uses CONFIG_LOGICAL_CPUS
|
||||
uses CONFIG_MAX_PHYSICAL_CPUS
|
||||
uses LINUXBIOS_EXTRA_VERSION
|
||||
uses XIP_ROM_SIZE
|
||||
uses XIP_ROM_BASE
|
||||
|
||||
uses HAVE_HARD_RESET
|
||||
|
||||
#uses CONFIG_VGABIOS
|
||||
#uses CONFIG_REALMODE_IDT
|
||||
#uses CONFIG_PCIBIOS
|
||||
#uses VGABIOS_START
|
||||
#uses SCSIFW_START
|
||||
|
||||
#
|
||||
#uses CONFIG_LSI_SCSI_FW_FIXUP
|
||||
|
||||
option HAVE_HARD_RESET=1
|
||||
|
||||
option HAVE_OPTION_TABLE=1
|
||||
option HAVE_MP_TABLE=1
|
||||
option CPU_FIXUP=1
|
||||
option CONFIG_UDELAY_TSC=0
|
||||
option i686=1
|
||||
option i586=1
|
||||
option INTEL_PPRO_MTRR=1
|
||||
option k7=1
|
||||
option k8=1
|
||||
option ROM_SIZE=524288
|
||||
|
||||
#option CONFIG_VGABIOS=0
|
||||
#option CONFIG_REALMODE_IDT=0
|
||||
#option CONFIG_PCIBIOS=0
|
||||
#option VGABIOS_START=0xfff8c000
|
||||
#option SCSIFW_START=0xfff80000
|
||||
|
||||
|
||||
option HAVE_FALLBACK_BOOT=1
|
||||
|
||||
# use the new chip configure code.
|
||||
|
||||
option CONFIG_CHIP_CONFIGURE=1
|
||||
#option CONFIG_LSI_SCSI_FW_FIXUP=1
|
||||
|
||||
|
||||
#
|
||||
###
|
||||
### Build code to export a programmable irq routing table
|
||||
###
|
||||
option HAVE_PIRQ_TABLE=1
|
||||
option IRQ_SLOT_COUNT=22
|
||||
#
|
||||
###
|
||||
### Build code for SMP support
|
||||
### Only worry about 2 micro processors
|
||||
###
|
||||
option CONFIG_SMP=1
|
||||
option CONFIG_MAX_CPUS=4
|
||||
option CONFIG_LOGICAL_CPUS=0
|
||||
option CONFIG_MAX_PHYSICAL_CPUS=4
|
||||
#
|
||||
###
|
||||
### Build code to setup a generic IOAPIC
|
||||
###
|
||||
option CONFIG_IOAPIC=1
|
||||
#
|
||||
###
|
||||
### MEMORY_HOLE instructs earlymtrr.inc to
|
||||
### enable caching from 0-640KB and to disable
|
||||
### caching from 640KB-1MB using fixed MTRRs
|
||||
###
|
||||
### Enabling this option breaks SMP because secondary
|
||||
### CPU identification depends on only variable MTRRs
|
||||
### being enabled.
|
||||
###
|
||||
#option MEMORY_HOLE=0
|
||||
#
|
||||
###
|
||||
### Clean up the motherboard id strings
|
||||
###
|
||||
option MAINBOARD_PART_NUMBER="S4880"
|
||||
option MAINBOARD_VENDOR="Tyan"
|
||||
#
|
||||
###
|
||||
### Compute the location and size of where this firmware image
|
||||
### (linuxBIOS plus bootloader) will live in the boot rom chip.
|
||||
###
|
||||
#option FALLBACK_SIZE=524288
|
||||
option FALLBACK_SIZE=98304
|
||||
|
||||
## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy.
|
||||
option ROM_IMAGE_SIZE=65536
|
||||
|
||||
|
||||
###
|
||||
### Compute where this copy of linuxBIOS will start in the boot rom
|
||||
###
|
||||
#
|
||||
###
|
||||
|
||||
## We do use compressed image
|
||||
option CONFIG_COMPRESS=1
|
||||
|
||||
option CONFIG_CONSOLE_SERIAL8250=1
|
||||
option TTYS0_BAUD=115200
|
||||
|
||||
##
|
||||
### Select the linuxBIOS loglevel
|
||||
##
|
||||
## EMERG 1 system is unusable
|
||||
## ALERT 2 action must be taken immediately
|
||||
## CRIT 3 critical conditions
|
||||
## ERR 4 error conditions
|
||||
## WARNING 5 warning conditions
|
||||
## NOTICE 6 normal but significant condition
|
||||
## INFO 7 informational
|
||||
## DEBUG 8 debug-level messages
|
||||
## SPEW 9 Way too many details
|
||||
|
||||
## Request this level of debugging output
|
||||
option DEFAULT_CONSOLE_LOGLEVEL=8
|
||||
## At a maximum only compile in this level of debugging
|
||||
option MAXIMUM_CONSOLE_LOGLEVEL=8
|
||||
|
||||
option DEBUG=1
|
||||
|
||||
#
|
||||
|
||||
## LinuxBIOS C code runs at this location in RAM
|
||||
option _RAMBASE=0x004000
|
||||
|
||||
##
|
||||
## Use a 256K stack
|
||||
##
|
||||
option STACK_SIZE=0x8000
|
||||
|
||||
##
|
||||
## Use a 384K heap
|
||||
##
|
||||
option HEAP_SIZE=0xc000
|
||||
|
||||
#
|
||||
###
|
||||
### Compute the start location and size size of
|
||||
### The linuxBIOS bootloader.
|
||||
###
|
||||
option CONFIG_ROM_STREAM = 1
|
||||
|
||||
#
|
||||
#
|
||||
romimage "normal"
|
||||
# 48K for SCSI FW
|
||||
option ROM_SIZE = 475136
|
||||
# 48K for SCSI FW and 48K for ATI ROM
|
||||
# option ROM_SIZE = 425984
|
||||
option LINUXBIOS_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal"
|
||||
option USE_FALLBACK_IMAGE=0
|
||||
option ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE)
|
||||
option ROM_SECTION_OFFSET= 0
|
||||
|
||||
option PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE)
|
||||
option CONFIG_ROM_STREAM_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
option _ROMBASE = (CONFIG_ROM_STREAM_START + PAYLOAD_SIZE)
|
||||
|
||||
option XIP_ROM_SIZE = FALLBACK_SIZE
|
||||
option XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE)
|
||||
|
||||
mainboard tyan/s4880
|
||||
payload ../../tg3--ide_disk.zelf
|
||||
end
|
||||
|
||||
romimage "fallback"
|
||||
option LINUXBIOS_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback"
|
||||
option USE_FALLBACK_IMAGE=1
|
||||
option ROM_SECTION_SIZE = FALLBACK_SIZE
|
||||
option ROM_SECTION_OFFSET= (ROM_SIZE - FALLBACK_SIZE)
|
||||
|
||||
option PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE)
|
||||
option CONFIG_ROM_STREAM_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
||||
option _ROMBASE = (CONFIG_ROM_STREAM_START + PAYLOAD_SIZE)
|
||||
|
||||
option XIP_ROM_SIZE = FALLBACK_SIZE
|
||||
option XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE)
|
||||
|
||||
mainboard tyan/s4880
|
||||
payload ../../tg3.zelf
|
||||
end
|
||||
|
||||
buildrom ./linuxbios.rom ROM_SIZE "normal" "fallback"
|
|
@ -0,0 +1 @@
|
|||
2.0
|
|
@ -0,0 +1,8 @@
|
|||
#!/bin/bash
|
||||
TYANMB=s4880
|
||||
cd "$TYANMB"
|
||||
make
|
||||
#cat ../fwx.rom ../atix.rom ./normal/linuxbios.rom ./fallback/linuxbios.rom > $TYANMB"_linuxbios.rom"
|
||||
cat ../fwx.rom ./normal/linuxbios.rom ./fallback/linuxbios.rom > $TYANMB"_linuxbios.rom"
|
||||
#cat ./normal/linuxbios.rom ./fallback/linuxbios.rom > $TYANMB"_linuxbios.rom"
|
||||
cp -f $TYANMB"_linuxbios.rom" /home/yhlu/
|
Loading…
Reference in New Issue