ec/google: update ec_commands.h
Copy from chrome-ec codebase, except for keeping the long-form license header. BUG=b:64468585 BRANCH=none TEST=with the other sku-id related patches applied, coreboot obtains the right SKU ID from EC Change-Id: I513123547f3854945e827d2f7f6c0df6591886eb Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/20945 Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -31,7 +31,7 @@
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#ifndef __CROS_EC_EC_COMMANDS_H
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#define __CROS_EC_EC_COMMANDS_H
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#ifndef __ACPI__
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#if !defined(__ACPI__) && !defined(__KERNEL__)
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#include <stdint.h>
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#endif
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@ -1120,6 +1120,14 @@ struct __ec_align4 ec_response_get_features {
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uint32_t flags[2];
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};
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/*****************************************************************************/
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/* Get the board's SKU ID from EC */
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#define EC_CMD_GET_SKU_ID 0x000E
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struct __ec_align4 ec_response_sku_id {
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uint32_t sku_id;
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};
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/*****************************************************************************/
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/* Flash commands */
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@ -1152,6 +1160,13 @@ struct __ec_align4 ec_response_flash_info {
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/* EC flash erases bits to 0 instead of 1 */
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#define EC_FLASH_INFO_ERASE_TO_0 (1 << 0)
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/* Flash must be selected for read/write/erase operations to succeed. This may
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* be necessary on a chip where write/erase can be corrupted by other board
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* activity, or where the chip needs to enable some sort of programming voltage,
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* or where the read/write/erase operations require cleanly suspending other
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* chip functionality. */
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#define EC_FLASH_INFO_SELECT_REQUIRED (1 << 1)
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/*
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* Version 1 returns the same initial fields as version 0, with additional
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* fields following.
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@ -1422,6 +1437,16 @@ struct __ec_align1 ec_response_flash_spi_info {
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uint8_t sr1, sr2;
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};
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/* Select flash during flash operations */
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#define EC_CMD_FLASH_SELECT 0x0019
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struct __ec_align4 ec_params_flash_select {
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/* 1 to select flash, 0 to deselect flash */
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uint8_t select;
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};
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/*****************************************************************************/
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/* PWM commands */
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@ -2980,6 +3005,7 @@ struct __ec_align1 ec_response_get_next_event {
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#define EC_MKBP_POWER_BUTTON 0
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#define EC_MKBP_VOL_UP 1
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#define EC_MKBP_VOL_DOWN 2
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#define EC_MKBP_RECOVERY 3
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/* Switches */
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#define EC_MKBP_LID_OPEN 0
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@ -3935,6 +3961,9 @@ struct __ec_align1 ec_response_usb_pd_control_v1 {
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#define EC_CMD_USB_PD_PORTS 0x0102
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/* Maximum number of PD ports on a device, num_ports will be <= this */
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#define EC_USB_PD_MAX_PORTS 8
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struct __ec_align1 ec_response_usb_pd_ports {
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uint8_t num_ports;
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};
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@ -4425,6 +4454,6 @@ struct __ec_align4 ec_params_tp_frame_get {
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#define EC_LPC_ADDR_OLD_PARAM EC_HOST_CMD_REGION1
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#define EC_OLD_PARAM_SIZE EC_HOST_CMD_REGION_SIZE
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#endif /* !__ACPI__ */
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#endif /* !__ACPI__ && !__KERNEL__ */
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#endif /* __CROS_EC_EC_COMMANDS_H */
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