cpu/intel/microcode: Drop unnecessary alignment for split microcode

This patch drops the unnecessary alignment of 64 bytes that was
introduced when implementing the split Intel microcode packing logic
into CBFS.

- The 16-byte alignment that is already used for Intel microcode is
sufficient.
- Removes unnecessary alignment check of 64 bytes against an AMD
platform specific config.

TEST=Able to build and boot google/rex without any functional
impact.

Change-Id: Icc44e9511e321592de7ab8d1346103d0a9951c9b
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76397
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>

src/cpu/intel/microcode/Makefile.inc

@@ -19,7 +19,7 @@ $(foreach params,$(microcode-params), \
 	$(eval cbfs-files-y += $(params)) \
 	$(eval $(params)-file := $(microcode-params-dir)/$(params)) \
 	$(eval $(params)-type := microcode) \
-	$(eval $(params)-align := $(if $(filter y,$(CONFIG_SOC_AMD_COMMON_BLOCK_LPC_SPI_DMA)),64,16)) \
+	$(eval $(params)-align := 16) \
 )
 
 endif