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soc/intel/meteorlake: Add missing entry for GSPI2 

This patch adds missing ASL entry for GSPI2 device.

Change-Id: I8f8410947b77d1a9bab2fa5929f30c803a78266d
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70354
Reviewed-by: Tarun Tuli <taruntuli@google.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Ivy Jian <ivy.jian@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Subrata Banik 2022-12-05 21:07:49 +05:30
parent d90154c8de
commit 0fbbdfe60e
1 changed files with 6 additions and 0 deletions
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6
src/soc/intel/meteorlake/acpi/serialio.asl
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@ -50,6 +50,12 @@ Device (SPI1)
Name (_DDN, "Serial IO SPI Controller 1") Name (_DDN, "Serial IO SPI Controller 1")
} }
Device (SPI2)
{
Name (_ADR, 0x00120006)
Name (_DDN, "Serial IO SPI Controller 2")
}
Device (UAR0) Device (UAR0)
{ {
Name (_ADR, 0x001e0000) Name (_ADR, 0x001e0000)