soc/mediatek: move power status bits under each chip

The power status bits of display and audio of MT8192 are different
from the bits of MT8173 & MT8183, so move those under each chip.

Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Change-Id: Iaa211b8db733d8aa52d93af9e507042bf0984d55
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45393
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
This commit is contained in:
Weiyi Lu 2020-04-09 11:59:50 +08:00 committed by Hung-Te Lin
parent d121a117cc
commit 0fed84b8c4
3 changed files with 4 additions and 5 deletions

View File

@ -21,11 +21,6 @@ enum {
PWR_RST_B = 1U << 0 PWR_RST_B = 1U << 0
}; };
enum {
DISP_PWR_STA_MASK = 0x1 << 3,
AUDIO_PWR_STA_MASK = 0x1 << 24,
};
static void mtcmos_power_on(const struct power_domain_data *pd) static void mtcmos_power_on(const struct power_domain_data *pd)
{ {
write32(&mtk_spm->poweron_config_set, write32(&mtk_spm->poweron_config_set,

View File

@ -11,8 +11,10 @@ enum {
}; };
enum { enum {
DISP_PWR_STA_MASK = 0x1 << 3,
DISP_SRAM_PDN_MASK = 0xf << 8, DISP_SRAM_PDN_MASK = 0xf << 8,
DISP_SRAM_ACK_MASK = 0x1 << 12, DISP_SRAM_ACK_MASK = 0x1 << 12,
AUDIO_PWR_STA_MASK = 0x1 << 24,
AUDIO_SRAM_PDN_MASK = 0xf << 8, AUDIO_SRAM_PDN_MASK = 0xf << 8,
AUDIO_SRAM_ACK_MASK = 0xf << 12, AUDIO_SRAM_ACK_MASK = 0xf << 12,
}; };

View File

@ -117,8 +117,10 @@
#define PCM_SW_INT_ALL (0x3FF) #define PCM_SW_INT_ALL (0x3FF)
enum { enum {
DISP_PWR_STA_MASK = 0x1 << 3,
DISP_SRAM_PDN_MASK = 0x1 << 8, DISP_SRAM_PDN_MASK = 0x1 << 8,
DISP_SRAM_ACK_MASK = 0x1 << 12, DISP_SRAM_ACK_MASK = 0x1 << 12,
AUDIO_PWR_STA_MASK = 0x1 << 24,
AUDIO_SRAM_PDN_MASK = 0xf << 8, AUDIO_SRAM_PDN_MASK = 0xf << 8,
AUDIO_SRAM_ACK_MASK = 0xf << 12, AUDIO_SRAM_ACK_MASK = 0xf << 12,
}; };