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Modify DMI init for IvyBridge 

The ASPM setting for the Direct Media Interface should no longer be done on
Ivybridge/PantherPoint based systems.

Change-Id: Id30de1beb1b162564048e76712736ccf7049dc7c
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-on: http://review.coreboot.org/969
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
This commit is contained in:
Vincent Palatin 2012-03-28 16:10:29 -07:00 committed by Stefan Reinauer
parent 459b7777fe
commit 0ff99b70f5
1 changed files with 11 additions and 7 deletions
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18
src/northbridge/intel/sandybridge/northbridge.c
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@ -347,10 +347,12 @@ static void northbridge_dmi_init(struct device *dev)
DMIBAR32(0x1d0) = 0xffffffff; DMIBAR32(0x1d0) = 0xffffffff;
/* Steps prior to DMI ASPM */ /* Steps prior to DMI ASPM */
reg32 = DMIBAR32(0x250); if ((bridge_silicon_revision() & BASE_REV_MASK) == BASE_REV_SNB) {
reg32 &= ~((1 << 22)|(1 << 20)); reg32 = DMIBAR32(0x250);
reg32 |= (1 << 21); reg32 &= ~((1 << 22)|(1 << 20));
DMIBAR32(0x250) = reg32; reg32 |= (1 << 21);
DMIBAR32(0x250) = reg32;
}
reg32 = DMIBAR32(0x238); reg32 = DMIBAR32(0x238);
reg32 |= (1 << 29); reg32 |= (1 << 29);
@ -372,9 +374,11 @@ static void northbridge_dmi_init(struct device *dev)
} }
/* Enable ASPM on SNB link, should happen before PCH link */ /* Enable ASPM on SNB link, should happen before PCH link */
reg32 = DMIBAR32(0xd04); if ((bridge_silicon_revision() & BASE_REV_MASK) == BASE_REV_SNB) {
reg32 |= (1 << 4); reg32 = DMIBAR32(0xd04);
DMIBAR32(0xd04) = reg32; reg32 |= (1 << 4);
DMIBAR32(0xd04) = reg32;
}
reg32 = DMIBAR32(0x88); reg32 = DMIBAR32(0x88);
reg32 |= (1 << 1) | (1 << 0); reg32 |= (1 << 1) | (1 << 0);