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soc/intel/ehl: Fix logical bug for PseTsnGbePhyInterfaceType 

By right if PseTsnGbeSgmiiEnable is disable,
PseTsnGbePhyInterfaceType should use RGMII setting.

Signed-off-by: Lean Sheng Tan <sheng.tan@9elements.com>
Change-Id: If593a5534716a9e93f99cb155fb5e86e12b1df17
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64477
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com>
This commit is contained in:
Lean Sheng Tan 2022-05-18 17:35:31 +02:00 committed by Felix Held
parent a68824185e
commit 100514d8c7
1 changed files with 1 additions and 1 deletions
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src/soc/intel/elkhartlake/fsp_params.c
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@ -134,7 +134,7 @@ static void fill_fsps_tsn_params(FSP_S_CONFIG *params,
params->PseTsnGbeMultiVcEnable[i] = config->PseTsnGbeMultiVcEnable[i];
params->PseTsnGbeSgmiiEnable[i] = config->PseTsnGbeSgmiiEnable[i];
params->PseTsnGbePhyInterfaceType[i] =
!!config->PseTsnGbeSgmiiEnable[i] ?
!config->PseTsnGbeSgmiiEnable[i] ?
RGMII : config->PseTsnGbePhyType[i];
params->PseTsnGbeLinkSpeed[i] =
(params->PseTsnGbePhyInterfaceType[i] < SGMII_plus) ?