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soc/amd/common/psp: Only set SPL fuses if an SPL file is present 

Use the presence of an SPL (Software Patch Level) file to trigger the
function that reads and writes the SPL fuses. The current Kconfig
option will be used to decide to write the fuses. This allows us to
see the state of the SPL update bit which determines whether or not
SPL fusing is allowed and needed before enabling the fusing.

- Refactor a bit to prepare for following changes.
- Update phrasing

Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: I7bd2798b984673a4bd3c72f3cab52f1c9a786c67
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73517
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
This commit is contained in:
Martin Roth 2023-03-06 17:43:13 -07:00 committed by Felix Held
parent d91625da60
commit 1011cf2375
2 changed files with 16 additions and 9 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
src/soc/amd/common/block/psp/psp_def.h
View File

@ -108,5 +108,6 @@ void psp_print_cmd_status(int cmd_status, struct mbox_buffer_header *header);
int send_psp_command(u32 command, void *buffer); int send_psp_command(u32 command, void *buffer);
uint32_t soc_read_c2p38(void); uint32_t soc_read_c2p38(void);
void psp_set_spl_fuse(void *unused);
#endif /* __AMD_PSP_DEF_H__ */ #endif /* __AMD_PSP_DEF_H__ */

24
src/soc/amd/common/block/psp/psp_gen2.c
View File

@ -114,25 +114,31 @@ uint32_t soc_read_c2p38(void)
return smn_read32(SMN_PSP_PUBLIC_BASE + CORE_2_PSP_MSG_38_OFFSET); return smn_read32(SMN_PSP_PUBLIC_BASE + CORE_2_PSP_MSG_38_OFFSET);
} }
static void psp_set_spl_fuse(void *unused) void psp_set_spl_fuse(void *unused)
{ {
if (!CONFIG(SOC_AMD_COMMON_BLOCK_PSP_FUSE_SPL))
return;
int cmd_status = 0; int cmd_status = 0;
struct mbox_cmd_late_spl_buffer buffer = { struct mbox_cmd_late_spl_buffer buffer = {
.header = { .header = {
.size = sizeof(buffer) .size = sizeof(buffer)
} }
}; };
uint32_t c2p38 = soc_read_c2p38();
if (soc_read_c2p38() & CORE_2_PSP_MSG_38_FUSE_SPL) { if (c2p38 & CORE_2_PSP_MSG_38_FUSE_SPL) {
printk(BIOS_DEBUG, "PSP: Fuse SPL requested\n"); printk(BIOS_DEBUG, "PSP: SPL Fusing may be updated.\n");
cmd_status = send_psp_command(MBOX_BIOS_CMD_SET_SPL_FUSE, &buffer);
psp_print_cmd_status(cmd_status, NULL);
} else { } else {
printk(BIOS_DEBUG, "PSP: Fuse SPL not requested\n"); printk(BIOS_DEBUG, "PSP: SPL Fusing not currently required.\n");
return;
} }
if (!CONFIG(SOC_AMD_COMMON_BLOCK_PSP_FUSE_SPL))
return;
printk(BIOS_DEBUG, "PSP: SPL Fusing Update Requested.\n");
cmd_status = send_psp_command(MBOX_BIOS_CMD_SET_SPL_FUSE, &buffer);
psp_print_cmd_status(cmd_status, NULL);
} }
#if CONFIG(HAVE_SPL_FILE)
BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_LOAD, BS_ON_ENTRY, psp_set_spl_fuse, NULL); BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_LOAD, BS_ON_ENTRY, psp_set_spl_fuse, NULL);
#endif