diff --git a/configs/config.google_meep_cros b/configs/config.google_meep_cros
index f87b02b5e9..9911614f16 100644
--- a/configs/config.google_meep_cros
+++ b/configs/config.google_meep_cros
@@ -14,7 +14,6 @@ CONFIG_MRC_CLEAR_NORMAL_CACHE_ON_RECOVERY_RETRAIN=y
 
 # Event Logging
 CONFIG_CMOS_POST=y
-CONFIG_CMOS_POST_EXTRA=y
 CONFIG_CMOS_POST_OFFSET=0x70
 CONFIG_COLLECT_TIMESTAMPS=y
 CONFIG_ELOG=y
diff --git a/configs/config.google_reef_cros b/configs/config.google_reef_cros
index 9bbb3b3f59..6dcda442db 100644
--- a/configs/config.google_reef_cros
+++ b/configs/config.google_reef_cros
@@ -10,5 +10,4 @@ CONFIG_SPI_FLASH_SMM=y
 # CONFIG_CONSOLE_SERIAL is not set
 CONFIG_CMOS_POST=y
 CONFIG_CMOS_POST_OFFSET=0x70
-CONFIG_CMOS_POST_EXTRA=y
 CONFIG_PAYLOAD_NONE=y
diff --git a/src/console/Kconfig b/src/console/Kconfig
index b893698a20..7c6e9bc5e0 100644
--- a/src/console/Kconfig
+++ b/src/console/Kconfig
@@ -392,14 +392,6 @@ config CMOS_POST_OFFSET
 	  If CONFIG_HAVE_OPTION_TABLE is enabled then it will use the value
 	  defined in the mainboard option table.
 
-config CMOS_POST_EXTRA
-	bool "Store extra logging info into CMOS"
-	depends on CMOS_POST
-	default n
-	help
-	  This will enable extra logging of work that happens between post
-	  codes into CMOS for debug.  This uses an additional 8 bytes of CMOS.
-
 config CONSOLE_POST
 	bool "Show POST codes on the debug console"
 	depends on !NO_POST
diff --git a/src/drivers/elog/elog.c b/src/drivers/elog/elog.c
index ca604dde3a..1d4b1351b5 100644
--- a/src/drivers/elog/elog.c
+++ b/src/drivers/elog/elog.c
@@ -765,7 +765,6 @@ static void log_last_boot_post(void)
 	       "in previous boot: 0x%02x/0x%04x\n", code, extra);
 
 	elog_add_event_word(ELOG_TYPE_LAST_POST_CODE, code);
-	/* Always zero with !CMOS_POST_EXTRA. */
 	if (extra)
 		elog_add_event_dword(ELOG_TYPE_POST_EXTRA, extra);
 #endif
diff --git a/src/drivers/pc80/rtc/post.c b/src/drivers/pc80/rtc/post.c
index 5bee5be812..41a664e321 100644
--- a/src/drivers/pc80/rtc/post.c
+++ b/src/drivers/pc80/rtc/post.c
@@ -20,13 +20,11 @@ int cmos_post_previous_boot(u8 *code, u32 *extra)
 	switch (cmos_read(CMOS_POST_BANK_OFFSET)) {
 	case CMOS_POST_BANK_0_MAGIC:
 		*code = cmos_read(CMOS_POST_BANK_1_OFFSET);
-		if (CONFIG(CMOS_POST_EXTRA))
-			*extra = cmos_read32(CMOS_POST_BANK_1_EXTRA);
+		*extra = cmos_read32(CMOS_POST_BANK_1_EXTRA);
 		break;
 	case CMOS_POST_BANK_1_MAGIC:
 		*code = cmos_read(CMOS_POST_BANK_0_OFFSET);
-		if (CONFIG(CMOS_POST_EXTRA))
-			*extra = cmos_read32(CMOS_POST_BANK_0_EXTRA);
+		*extra = cmos_read32(CMOS_POST_BANK_0_EXTRA);
 		break;
 	}
 
@@ -61,10 +59,8 @@ void cmos_post_init(void)
 		/* Initialize to zero */
 		cmos_write(0, CMOS_POST_BANK_0_OFFSET);
 		cmos_write(0, CMOS_POST_BANK_1_OFFSET);
-		if (CONFIG(CMOS_POST_EXTRA)) {
-			cmos_write32(0, CMOS_POST_BANK_0_EXTRA);
-			cmos_write32(0, CMOS_POST_BANK_1_EXTRA);
-		}
+		cmos_write32(0, CMOS_POST_BANK_0_EXTRA);
+		cmos_write32(0, CMOS_POST_BANK_1_EXTRA);
 	}
 
 	cmos_write(magic, CMOS_POST_BANK_OFFSET);
@@ -88,9 +84,6 @@ void cmos_post_code(u8 value)
 
 void cmos_post_extra(u32 value)
 {
-	if (!CONFIG(CMOS_POST_EXTRA))
-		return;
-
 	spin_lock(&cmos_post_lock);
 
 	switch (cmos_read(CMOS_POST_BANK_OFFSET)) {