kblrvp: Add support for Hynix memory

Add support for hynix memory variant of RVP3.

Change-Id: Ic1f8630b36eb131b70c5e3b620957d9602da11ee
Signed-off-by: Naresh G Solanki <naresh.solanki@intel.com>
Reviewed-on: https://review.coreboot.org/17339
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>

src/mainboard/intel/kblrvp/spd/Makefile.inc

@@ -18,23 +18,14 @@ romstage-y += spd_util.c
 
 SPD_BIN = $(obj)/spd.bin
 
-SPD_SOURCES  = rvp3	# 0b0000 Dual Channel 4GB
-SPD_SOURCES += empty
-SPD_SOURCES += empty
-SPD_SOURCES += empty
-SPD_SOURCES += empty
-SPD_SOURCES += empty
-SPD_SOURCES += empty
-SPD_SOURCES += empty
-SPD_SOURCES += empty
-SPD_SOURCES += empty
-SPD_SOURCES += empty
-SPD_SOURCES += empty
-SPD_SOURCES += empty
-SPD_SOURCES += empty
-SPD_SOURCES += empty
-SPD_SOURCES += empty
-
+SPD_SOURCES  = rvp3				# 0b000 Dual Channel 4GB
+SPD_SOURCES += empty				# 1b001
+SPD_SOURCES += empty				# 2b010
+SPD_SOURCES += empty				# 3b011
+SPD_SOURCES += empty				# 4b100
+SPD_SOURCES += empty				# 5b101
+SPD_SOURCES += hynix_dimm_H9CCNNNBJTMLAR	# 6b110 Dual Channel 8GB
+SPD_SOURCES += empty				# 7b111
 
 SPD_DEPS := $(foreach f, $(SPD_SOURCES), src/mainboard/$(MAINBOARDDIR)/spd/$(f).spd.hex)
 

src/mainboard/intel/kblrvp/spd/hynix_dimm_H9CCNNNBJTMLAR.spd.hex

@@ -0,0 +1,16 @@
+91 20 F1 03 05 19 05 0B 03 11 01 08 09 00 40 05
+78 78 90 50 90 11 50 E0 90 06 3C 3C 01 90 00 00
+00 80 CA FA 00 00 00 A8 00 08 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 0F 01 02 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 80 AD 00 00 00 55 00 00 00 00 00
+48 39 43 43 4E 4E 4E 42 4A 54 4D 4C 41 52 2D 4E
+55 44 00 00 80 AD 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

src/mainboard/intel/kblrvp/spd/spd.c

@@ -49,6 +49,7 @@ static void mainboard_print_spd_info(uint8_t spd[])
 		printk(BIOS_INFO, "DDR3\n");
 		break;
 	case SPD_DRAM_LPDDR3:
+	case SPD_DRAM_LPDDR3_INTEL:
 		printk(BIOS_INFO, "LPDDR3\n");
 		break;
 	default:

src/mainboard/intel/kblrvp/spd/spd.h

@@ -26,6 +26,7 @@
 #define SPD_DRAM_TYPE		2
 #define  SPD_DRAM_DDR3		0x0B
 #define  SPD_DRAM_LPDDR3	0x0F
+#define  SPD_DRAM_LPDDR3_INTEL	0xF1
 #define SPD_DENSITY_BANKS	4
 #define SPD_ADDRESSING		5
 #define SPD_ORGANIZATION	7

src/mainboard/intel/kblrvp/spd/spd_util.c

@@ -19,7 +19,7 @@
 #include <string.h>
 #include <soc/pei_data.h>
 #include <soc/pei_wrapper.h>
-#include "boardid.h"
+#include "../board_id.h"
 #include "spd.h"
 
 void mainboard_fill_dq_map_data(void *dq_map_ptr)
@@ -65,7 +65,7 @@ uintptr_t mainboard_get_spd_data(void)
 	int spd_index, spd_span;
 	size_t spd_file_len;
 
-	spd_index = 0;
+	spd_index = (get_board_id() >> 5) & 0xF;
 	printk(BIOS_INFO, "SPD index %d\n", spd_index);
 
 	/* Load SPD data from CBFS */