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soc/mediatek: dsi: fine tune the delta time for EoTp 

We seperate the EoTp packet extra data. So need to reduce the delta.

BUG=b:173603645
BRANCH=kukui
TEST=Display is normal on Kukui

Signed-off-by: Jitao Shi <jitao.shi@mediatek.com>
Change-Id: I0666068cfb04b78eb706278814163f050da32b9c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51432
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
This commit is contained in:
Jitao Shi 2021-03-12 17:35:18 +08:00 committed by Patrick Georgi
parent fc862dd7d2
commit 104b7a949d
1 changed files with 1 additions and 1 deletions
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src/soc/mediatek/common/dsi.c
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@ -204,7 +204,7 @@ static void mtk_dsi_config_vdo_timing(u32 mode_flags, u32 format, u32 lanes,
data_phy_cycles = phy_timing->lpx + phy_timing->da_hs_prepare +
phy_timing->da_hs_zero + phy_timing->da_hs_exit + 3;
u32 delta = 12;
u32 delta = 10;
if (mode_flags & MIPI_DSI_MODE_EOT_PACKET)
delta += 2;