From 10bc806ab33e1ce98223913975f307092e621c56 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= <kyosti.malkki@gmail.com>
Date: Sat, 4 Jan 2020 11:58:50 +0200
Subject: [PATCH] console/post: Split parts to arch/
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Both IO port and cmos are currently arch/x86 only features.

Change-Id: I010af3f645c0be38dd856657874c36103aebbdc2
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38187
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/arch/x86/Makefile.inc     |  1 +
 src/arch/x86/post.c           | 26 ++++++++++++++++++++++++++
 src/console/post.c            | 23 +++++++++--------------
 src/include/console/console.h |  1 +
 4 files changed, 37 insertions(+), 14 deletions(-)
 create mode 100644 src/arch/x86/post.c

diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc
index 6ed93e5182..534f2ce20d 100644
--- a/src/arch/x86/Makefile.inc
+++ b/src/arch/x86/Makefile.inc
@@ -99,6 +99,7 @@ all-y += boot.c
 all-y += memcpy.c
 all-y += memset.c
 all-y += cpu_common.c
+all-y += post.c
 
 endif
 
diff --git a/src/arch/x86/post.c b/src/arch/x86/post.c
new file mode 100644
index 0000000000..0a20babae1
--- /dev/null
+++ b/src/arch/x86/post.c
@@ -0,0 +1,26 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of
+ * the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <stdint.h>
+#include <console/console.h>
+#include <arch/io.h>
+
+void arch_post_code(uint8_t value)
+{
+	if (CONFIG(POST_IO))
+		outb(value, CONFIG_POST_IO_PORT);
+
+	if (CONFIG(CMOS_POST))
+		cmos_post_code(value);
+}
diff --git a/src/console/post.c b/src/console/post.c
index b9a7557f63..33d85e7675 100644
--- a/src/console/post.c
+++ b/src/console/post.c
@@ -14,11 +14,9 @@
 
 #include <stdint.h>
 #include <console/console.h>
-#if CONFIG(POST_IO)
-#include <arch/io.h>
-#endif
 
 /* Write POST information */
+void __weak arch_post_code(uint8_t value) { }
 
 /* Some mainboards have very nice features beyond just a simple display.
  * They can override this function.
@@ -27,16 +25,13 @@ void __weak mainboard_post(uint8_t value) { }
 
 void post_code(uint8_t value)
 {
-#if !CONFIG(NO_POST)
-#if CONFIG(CONSOLE_POST)
-	printk(BIOS_EMERG, "POST: 0x%02x\n", value);
-#endif
-#if CONFIG(CMOS_POST)
-	cmos_post_code(value);
-#endif
-#if CONFIG(POST_IO)
-	outb(value, CONFIG_POST_IO_PORT);
-#endif
-#endif
+	if (!CONFIG(NO_POST)) {
+		/* Assume this to be the most reliable and simplest type
+		   for displaying POST so keep it first. */
+		arch_post_code(value);
+
+		if (CONFIG(CONSOLE_POST))
+			printk(BIOS_EMERG, "POST: 0x%02x\n", value);
+	}
 	mainboard_post(value);
 }
diff --git a/src/include/console/console.h b/src/include/console/console.h
index d3c1d54dbc..c573123d60 100644
--- a/src/include/console/console.h
+++ b/src/include/console/console.h
@@ -29,6 +29,7 @@
 #include <console/vtxprintf.h>
 
 void post_code(u8 value);
+void arch_post_code(u8 value);
 void cmos_post_code(u8 value);
 #if CONFIG(CMOS_POST_EXTRA)
 void post_log_extra(u32 value);