mb/{x4x}: Remove unused 'include <northbridge/intel/x4x/iomap.h>'

Change-Id: I82f1d4325ea87585137fa81567aa82b80454c704
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36693
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>

src/mainboard/asrock/g41c-gs/romstage.c

@@ -19,7 +19,6 @@
 #include <device/pci_ops.h>
 #include <console/console.h>
 #include <arch/romstage.h>
-#include <northbridge/intel/x4x/iomap.h>
 #include <northbridge/intel/x4x/x4x.h>
 #include <southbridge/intel/common/gpio.h>
 #include <southbridge/intel/common/pmclib.h>

src/mainboard/asus/p5qc/romstage.c

@@ -23,7 +23,6 @@
 #include <arch/romstage.h>
 #include <superio/winbond/w83667hg-a/w83667hg-a.h>
 #include <superio/winbond/common/winbond.h>
-#include <northbridge/intel/x4x/iomap.h>
 
 #define SERIAL_DEV PNP_DEV(0x2e, W83667HG_A_SP1)
 #define LPC_DEV PCI_DEV(0, 0x1f, 0)

src/mainboard/asus/p5qpl-am/romstage.c

@@ -22,7 +22,6 @@
 #include <arch/romstage.h>
 #include <cpu/intel/speedstep.h>
 #include <cpu/x86/msr.h>
-#include <northbridge/intel/x4x/iomap.h>
 #include <northbridge/intel/x4x/x4x.h>
 #include <southbridge/intel/common/gpio.h>
 #include <southbridge/intel/common/pmclib.h>

src/mainboard/foxconn/g41s-k/romstage.c

@@ -19,7 +19,6 @@
 #include <console/console.h>
 #include <arch/romstage.h>
 #include <device/pci_ops.h>
-#include <northbridge/intel/x4x/iomap.h>
 #include <northbridge/intel/x4x/x4x.h>
 #include <southbridge/intel/common/gpio.h>
 #include <southbridge/intel/common/pmclib.h>

src/mainboard/gigabyte/ga-g41m-es2l/romstage.c

@@ -25,7 +25,6 @@
 #include <arch/romstage.h>
 #include <superio/ite/it8718f/it8718f.h>
 #include <superio/ite/common/ite.h>
-#include <northbridge/intel/x4x/iomap.h>
 
 #define SERIAL_DEV PNP_DEV(0x2e, IT8718F_SP1)
 #define GPIO_DEV PNP_DEV(0x2e, IT8718F_GPIO)

src/mainboard/intel/dg41wv/romstage.c

@@ -19,7 +19,6 @@
 #include <device/pci_ops.h>
 #include <console/console.h>
 #include <arch/romstage.h>
-#include <northbridge/intel/x4x/iomap.h>
 #include <northbridge/intel/x4x/x4x.h>
 #include <southbridge/intel/common/gpio.h>
 #include <southbridge/intel/common/pmclib.h>

src/mainboard/intel/dg43gt/romstage.c

@@ -23,7 +23,6 @@
 #include <arch/romstage.h>
 #include <superio/winbond/w83627dhg/w83627dhg.h>
 #include <superio/winbond/common/winbond.h>
-#include <northbridge/intel/x4x/iomap.h>
 
 #define SERIAL_DEV PNP_DEV(0x2e, W83627DHG_SP1)
 #define LPC_DEV PCI_DEV(0, 0x1f, 0)

src/mainboard/lenovo/thinkcentre_a58/romstage.c

@@ -23,7 +23,6 @@
 #include <arch/romstage.h>
 #include <device/pci_ops.h>
 #include <superio/smsc/smscsuperio/smscsuperio.h>
-#include <northbridge/intel/x4x/iomap.h>
 
 #define SERIAL_DEV PNP_DEV(0x2e, SMSCSUPERIO_SP1)
 #define LPC_DEV PCI_DEV(0, 0x1f, 0)