util/inteltool: use read* macros instead of pointers
Switch to using read* macros instead of pointers. Change-Id: I1fe54b496a5998597b79cdd7108f3a4075744a78 Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39503 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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10d522133e
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@ -84,9 +84,6 @@ static const io_register_t sunrise_ahci_sir_registers[] = {
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#define NUM_GHC (sizeof(ghc_regs)/sizeof(ghc_regs[0]))
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#define NUM_GHC (sizeof(ghc_regs)/sizeof(ghc_regs[0]))
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#define NUM_PORTCTL (sizeof(port_ctl_regs)/sizeof(port_ctl_regs[0]))
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#define NUM_PORTCTL (sizeof(port_ctl_regs)/sizeof(port_ctl_regs[0]))
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#define MMIO(offset) (*(uint32_t *)(mmio + offset))
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#define MMIO_PORT(offset) (*(uint32_t *)(mmio_port + offset))
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static void print_port(const uint8_t *const mmio, size_t port)
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static void print_port(const uint8_t *const mmio, size_t port)
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{
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{
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size_t i;
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size_t i;
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@ -96,10 +93,11 @@ static void print_port(const uint8_t *const mmio, size_t port)
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if (i / 4 < NUM_PORTCTL) {
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if (i / 4 < NUM_PORTCTL) {
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printf("0x%03zx: 0x%08x (%s)\n",
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printf("0x%03zx: 0x%08x (%s)\n",
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(size_t)(mmio_port - mmio) + i,
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(size_t)(mmio_port - mmio) + i,
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MMIO_PORT(i), port_ctl_regs[i / 4]);
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read32(mmio_port + i), port_ctl_regs[i / 4]);
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} else if (MMIO_PORT(i)) {
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} else if (read32(mmio_port + i)) {
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printf("0x%03zx: 0x%08x (Reserved)\n",
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printf("0x%03zx: 0x%08x (Reserved)\n",
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(size_t)(mmio_port - mmio) + i, MMIO_PORT(i));
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(size_t)(mmio_port - mmio) + i,
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read32(mmio_port + i));
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}
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}
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}
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}
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}
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}
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@ -195,22 +193,23 @@ int print_ahci(struct pci_dev *ahci)
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for (i = 0; i < 0x100; i += 4) {
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for (i = 0; i < 0x100; i += 4) {
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if (i / 4 < NUM_GHC) {
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if (i / 4 < NUM_GHC) {
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printf("0x%03zx: 0x%08x (%s)\n",
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printf("0x%03zx: 0x%08x (%s)\n",
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i, MMIO(i), ghc_regs[i / 4]);
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i, read32(mmio + i), ghc_regs[i / 4]);
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} else if (MMIO(i)) {
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} else if (read32(mmio + i)) {
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printf("0x%03zx: 0x%08x (Reserved)\n", i, MMIO(i));
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printf("0x%03zx: 0x%08x (Reserved)\n", i,
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read32(mmio + i));
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}
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}
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}
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}
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const size_t max_ports = (ahci_registers_size - 0x100) / 0x80;
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const size_t max_ports = (ahci_registers_size - 0x100) / 0x80;
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for (i = 0; i < max_ports; i++) {
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for (i = 0; i < max_ports; i++) {
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if (MMIO(0x0c) & 1 << i)
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if (read32(mmio + 0x0c) & 1 << i)
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print_port(mmio, i);
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print_port(mmio, i);
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}
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}
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puts("\nOther registers:");
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puts("\nOther registers:");
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for (i = 0x500; i < ahci_registers_size; i += 4) {
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for (i = 0x500; i < ahci_registers_size; i += 4) {
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if (MMIO(i))
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if (read32(mmio + i))
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printf("0x%03zx: 0x%08x\n", i, MMIO(i));
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printf("0x%03zx: 0x%08x\n", i, read32(mmio + i));
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}
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}
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unmap_physical((void *)mmio, ahci_registers_size);
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unmap_physical((void *)mmio, ahci_registers_size);
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@ -20,11 +20,11 @@
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#define AMB_CONFIG_SPACE_SIZE 0x20000
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#define AMB_CONFIG_SPACE_SIZE 0x20000
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#define AMB_ADDR(base, fn, reg) (base | ((fn & 7) << 8) | ((reg & 0xff)))
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#define AMB_ADDR(fn, reg) (((fn & 7) << 8) | ((reg & 0xff)))
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static uint32_t amb_read_config32(volatile void *base, int fn, int reg)
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static uint32_t amb_read_config32(volatile void *base, int fn, int reg)
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{
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{
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return *(uint32_t *)(AMB_ADDR((intptr_t)base, fn, reg));
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return read32(base + AMB_ADDR(fn, reg));
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}
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}
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static void amb_printreg32(volatile void *base, int fn, int reg,
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static void amb_printreg32(volatile void *base, int fn, int reg,
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@ -38,7 +38,7 @@ static void amb_printreg32(volatile void *base, int fn, int reg,
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static uint16_t amb_read_config16(volatile void *base, int fn, int reg)
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static uint16_t amb_read_config16(volatile void *base, int fn, int reg)
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{
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{
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return *(uint16_t *)(AMB_ADDR((intptr_t)base, fn, reg));
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return read16(base + AMB_ADDR(fn, reg));
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}
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}
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static void amb_printreg16(volatile void *base, int fn, int reg,
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static void amb_printreg16(volatile void *base, int fn, int reg,
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@ -53,7 +53,7 @@ static void amb_printreg16(volatile void *base, int fn, int reg,
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static uint8_t amb_read_config8(volatile void *base, int fn, int reg)
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static uint8_t amb_read_config8(volatile void *base, int fn, int reg)
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{
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{
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return *(uint8_t *)(AMB_ADDR((intptr_t)base, fn, reg));
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return read8(base + AMB_ADDR(fn, reg));
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}
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}
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static void amb_printreg8(volatile void *base, int fn, int reg,
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static void amb_printreg8(volatile void *base, int fn, int reg,
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@ -39,8 +39,8 @@ int print_gfx(struct pci_dev *gfx)
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exit(1);
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exit(1);
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}
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}
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for (i = 0; i < MMIO_SIZE; i += 4) {
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for (i = 0; i < MMIO_SIZE; i += 4) {
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if (*(uint32_t *)(mmio + i))
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if (read32(mmio + i))
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printf("0x%06x: 0x%08x\n", i, *(uint32_t *)(mmio + i));
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printf("0x%06x: 0x%08x\n", i, read32(mmio + i));
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}
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}
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unmap_physical((void *)mmio, MMIO_SIZE);
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unmap_physical((void *)mmio, MMIO_SIZE);
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return 0;
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return 0;
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@ -17,6 +17,7 @@
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#ifndef INTELTOOL_H
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#ifndef INTELTOOL_H
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#define INTELTOOL_H 1
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#define INTELTOOL_H 1
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#include <arch/mmio.h>
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#include <commonlib/helpers.h>
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#include <commonlib/helpers.h>
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#include <stdint.h>
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#include <stdint.h>
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@ -261,8 +261,8 @@ int print_mchbar(struct pci_dev *nb, struct pci_access *pacc, const char *dump_s
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printf("MCHBAR = 0x%08" PRIx64 " (MEM)\n\n", mchbar_phys);
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printf("MCHBAR = 0x%08" PRIx64 " (MEM)\n\n", mchbar_phys);
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for (i = 0; i < size; i += 4) {
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for (i = 0; i < size; i += 4) {
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if (*(uint32_t *)(mchbar + i))
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if (read32(mchbar + i))
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printf("0x%04x: 0x%08"PRIx32"\n", i, *(uint32_t *)(mchbar+i));
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printf("0x%04x: 0x%08"PRIx32"\n", i, read32(mchbar+i));
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}
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}
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switch (nb->device_id)
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switch (nb->device_id)
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@ -298,8 +298,8 @@ int print_epbar(struct pci_dev *nb)
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printf("EPBAR = 0x%08" PRIx64 " (MEM)\n\n", epbar_phys);
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printf("EPBAR = 0x%08" PRIx64 " (MEM)\n\n", epbar_phys);
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for (i = 0; i < size; i += 4) {
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for (i = 0; i < size; i += 4) {
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if (*(uint32_t *)(epbar + i))
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if (read32(epbar + i))
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printf("0x%04x: 0x%08x\n", i, *(uint32_t *)(epbar+i));
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printf("0x%04x: 0x%08x\n", i, read32(epbar+i));
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}
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}
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unmap_physical((void *)epbar, size);
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unmap_physical((void *)epbar, size);
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@ -428,27 +428,27 @@ int print_dmibar(struct pci_dev *nb)
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case 4:
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case 4:
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printf("dmibase+0x%04x: 0x%08x (%s)\n",
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printf("dmibase+0x%04x: 0x%08x (%s)\n",
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dmi_registers[i].addr,
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dmi_registers[i].addr,
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*(uint32_t *)(dmibar+dmi_registers[i].addr),
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read32(dmibar+dmi_registers[i].addr),
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dmi_registers[i].name);
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dmi_registers[i].name);
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break;
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break;
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case 2:
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case 2:
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printf("dmibase+0x%04x: 0x%04x (%s)\n",
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printf("dmibase+0x%04x: 0x%04x (%s)\n",
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dmi_registers[i].addr,
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dmi_registers[i].addr,
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*(uint16_t *)(dmibar+dmi_registers[i].addr),
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read16(dmibar+dmi_registers[i].addr),
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dmi_registers[i].name);
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dmi_registers[i].name);
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break;
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break;
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case 1:
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case 1:
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printf("dmibase+0x%04x: 0x%02x (%s)\n",
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printf("dmibase+0x%04x: 0x%02x (%s)\n",
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dmi_registers[i].addr,
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dmi_registers[i].addr,
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*(uint8_t *)(dmibar+dmi_registers[i].addr),
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read8(dmibar+dmi_registers[i].addr),
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dmi_registers[i].name);
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dmi_registers[i].name);
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break;
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break;
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}
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}
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}
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}
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} else {
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} else {
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for (i = 0; i < size; i += 4) {
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for (i = 0; i < size; i += 4) {
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if (*(uint32_t *)(dmibar + i))
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if (read32(dmibar + i))
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printf("0x%04x: 0x%08x\n", i, *(uint32_t *)(dmibar+i));
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printf("0x%04x: 0x%08x\n", i, read32(dmibar+i));
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}
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}
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}
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}
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@ -567,12 +567,12 @@ int print_pciexbar(struct pci_dev *nb)
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for (fn = 0; fn < 8; fn++) {
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for (fn = 0; fn < 8; fn++) {
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devbase = (bus * 1024 * 1024) + (dev * 32 * 1024) + (fn * 4 * 1024);
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devbase = (bus * 1024 * 1024) + (dev * 32 * 1024) + (fn * 4 * 1024);
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if (*(uint16_t *)(pciexbar + devbase) == 0xffff)
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if (read16(pciexbar + devbase) == 0xffff)
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continue;
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continue;
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/* This is a heuristics. Anyone got a better check? */
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/* This is a heuristics. Anyone got a better check? */
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if( (*(uint32_t *)(pciexbar + devbase + 256) == 0xffffffff) &&
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if( (read32(pciexbar + devbase + 256) == 0xffffffff) &&
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(*(uint32_t *)(pciexbar + devbase + 512) == 0xffffffff) ) {
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(read32(pciexbar + devbase + 512) == 0xffffffff) ) {
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#if DEBUG
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#if DEBUG
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printf("Skipped non-PCIe device %02x:%02x.%01x\n", bus, dev, fn);
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printf("Skipped non-PCIe device %02x:%02x.%01x\n", bus, dev, fn);
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#endif
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#endif
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@ -946,9 +946,9 @@ int print_pmbase(struct pci_dev *sb, struct pci_access *pacc)
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printf("PWRMBASE = 0x%08" PRIx64 " (MEM)\n\n", pwrmbase_phys);
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printf("PWRMBASE = 0x%08" PRIx64 " (MEM)\n\n", pwrmbase_phys);
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for (i = 0; i < pwrmbase_size; i += 4) {
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for (i = 0; i < pwrmbase_size; i += 4) {
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if (*(uint32_t *)(pwrmbase + i))
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if (read32(pwrmbase + i))
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printf("0x%04zx: 0x%08"PRIx32"\n",
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printf("0x%04zx: 0x%08"PRIx32"\n",
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i, *(uint32_t *)(pwrmbase + i));
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i, read32(pwrmbase + i));
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}
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}
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unmap_physical((void *)pwrmbase, pwrmbase_size);
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unmap_physical((void *)pwrmbase, pwrmbase_size);
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@ -147,8 +147,8 @@ int print_rcba(struct pci_dev *sb)
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printf("RCBA = 0x%08x (MEM)\n\n", rcba_phys);
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printf("RCBA = 0x%08x (MEM)\n\n", rcba_phys);
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for (i = 0; i < size; i += 4) {
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for (i = 0; i < size; i += 4) {
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if (*(uint32_t *)(rcba + i))
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if (read32(rcba + i))
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printf("0x%04x: 0x%08x\n", i, *(uint32_t *)(rcba + i));
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printf("0x%04x: 0x%08x\n", i, read32(rcba + i));
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}
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}
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unmap_physical((void *)rcba, size);
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unmap_physical((void *)rcba, size);
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@ -364,17 +364,17 @@ static int print_spibar(struct pci_dev *sb) {
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for (i = 0; i < size; i++) {
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for (i = 0; i < size; i++) {
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switch(spi_register[i].size) {
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switch(spi_register[i].size) {
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case 1:
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case 1:
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printf("0x%08x = %s\n", *(uint8_t *)(rcba + spibaroffset + spi_register[i].addr), spi_register[i].name);
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printf("0x%08x = %s\n", read8(rcba + spibaroffset + spi_register[i].addr), spi_register[i].name);
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break;
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break;
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case 2:
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case 2:
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printf("0x%08x = %s\n", *(uint16_t *)(rcba + spibaroffset + spi_register[i].addr), spi_register[i].name);
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printf("0x%08x = %s\n", read16(rcba + spibaroffset + spi_register[i].addr), spi_register[i].name);
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break;
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break;
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case 4:
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case 4:
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printf("0x%08x = %s\n", *(uint32_t *)(rcba + spibaroffset + spi_register[i].addr), spi_register[i].name);
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printf("0x%08x = %s\n", read32(rcba + spibaroffset + spi_register[i].addr), spi_register[i].name);
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break;
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break;
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case 8:
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case 8:
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printf("0x%08x%08x = %s\n", *(uint32_t *)(rcba + spibaroffset + spi_register[i].addr + 4),
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printf("0x%08x%08x = %s\n", read32(rcba + spibaroffset + spi_register[i].addr + 4),
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*(uint32_t *)(rcba + spibaroffset + spi_register[i].addr), spi_register[i].name);
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read32(rcba + spibaroffset + spi_register[i].addr), spi_register[i].name);
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break;
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break;
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}
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}
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}
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}
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