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util/inteltool: use read* macros instead of pointers 

Switch to using read* macros instead of pointers.

Change-Id: I1fe54b496a5998597b79cdd7108f3a4075744a78
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39503
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Michael Niewöhner 2020-03-13 19:08:21 +01:00 committed by Felix Held
parent 96cf680c3d
commit 10d522133e
9 changed files with 39 additions and 39 deletions
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23
util/inteltool/ahci.c
View File

@ -84,9 +84,6 @@ static const io_register_t sunrise_ahci_sir_registers[] = {
#define NUM_GHC (sizeof(ghc_regs)/sizeof(ghc_regs[0]))
#define NUM_PORTCTL (sizeof(port_ctl_regs)/sizeof(port_ctl_regs[0]))
#define MMIO(offset) (*(uint32_t *)(mmio + offset))
#define MMIO_PORT(offset) (*(uint32_t *)(mmio_port + offset))
static void print_port(const uint8_t *const mmio, size_t port)
{
size_t i;
@ -96,10 +93,11 @@ static void print_port(const uint8_t *const mmio, size_t port)
if (i / 4 < NUM_PORTCTL) {
printf("0x%03zx: 0x%08x (%s)\n",
(size_t)(mmio_port - mmio) + i,
MMIO_PORT(i), port_ctl_regs[i / 4]);
} else if (MMIO_PORT(i)) {
read32(mmio_port + i), port_ctl_regs[i / 4]);
} else if (read32(mmio_port + i)) {
printf("0x%03zx: 0x%08x (Reserved)\n",
(size_t)(mmio_port - mmio) + i, MMIO_PORT(i));
(size_t)(mmio_port - mmio) + i,
read32(mmio_port + i));
}
}
}
@ -195,22 +193,23 @@ int print_ahci(struct pci_dev *ahci)
for (i = 0; i < 0x100; i += 4) {
if (i / 4 < NUM_GHC) {
printf("0x%03zx: 0x%08x (%s)\n",
i, MMIO(i), ghc_regs[i / 4]);
} else if (MMIO(i)) {
printf("0x%03zx: 0x%08x (Reserved)\n", i, MMIO(i));
i, read32(mmio + i), ghc_regs[i / 4]);
} else if (read32(mmio + i)) {
printf("0x%03zx: 0x%08x (Reserved)\n", i,
read32(mmio + i));
}
}
const size_t max_ports = (ahci_registers_size - 0x100) / 0x80;
for (i = 0; i < max_ports; i++) {
if (MMIO(0x0c) & 1 << i)
if (read32(mmio + 0x0c) & 1 << i)
print_port(mmio, i);
}
puts("\nOther registers:");
for (i = 0x500; i < ahci_registers_size; i += 4) {
if (MMIO(i))
printf("0x%03zx: 0x%08x\n", i, MMIO(i));
if (read32(mmio + i))
printf("0x%03zx: 0x%08x\n", i, read32(mmio + i));
}
unmap_physical((void *)mmio, ahci_registers_size);

8
util/inteltool/amb.c
View File

@ -20,11 +20,11 @@
#define AMB_CONFIG_SPACE_SIZE 0x20000
#define AMB_ADDR(base, fn, reg) (base | ((fn & 7) << 8) | ((reg & 0xff)))
#define AMB_ADDR(fn, reg) (((fn & 7) << 8) | ((reg & 0xff)))
static uint32_t amb_read_config32(volatile void *base, int fn, int reg)
{
return *(uint32_t *)(AMB_ADDR((intptr_t)base, fn, reg));
return read32(base + AMB_ADDR(fn, reg));
}
static void amb_printreg32(volatile void *base, int fn, int reg,
@ -38,7 +38,7 @@ static void amb_printreg32(volatile void *base, int fn, int reg,
static uint16_t amb_read_config16(volatile void *base, int fn, int reg)
{
return *(uint16_t *)(AMB_ADDR((intptr_t)base, fn, reg));
return read16(base + AMB_ADDR(fn, reg));
}
static void amb_printreg16(volatile void *base, int fn, int reg,
@ -53,7 +53,7 @@ static void amb_printreg16(volatile void *base, int fn, int reg,
static uint8_t amb_read_config8(volatile void *base, int fn, int reg)
{
return *(uint8_t *)(AMB_ADDR((intptr_t)base, fn, reg));
return read8(base + AMB_ADDR(fn, reg));
}
static void amb_printreg8(volatile void *base, int fn, int reg,

4
util/inteltool/gfx.c
View File

@ -39,8 +39,8 @@ int print_gfx(struct pci_dev *gfx)
exit(1);
}
for (i = 0; i < MMIO_SIZE; i += 4) {
if (*(uint32_t *)(mmio + i))
printf("0x%06x: 0x%08x\n", i, *(uint32_t *)(mmio + i));
if (read32(mmio + i))
printf("0x%06x: 0x%08x\n", i, read32(mmio + i));
}
unmap_physical((void *)mmio, MMIO_SIZE);
return 0;

1
util/inteltool/inteltool.h
View File

@ -17,6 +17,7 @@
#ifndef INTELTOOL_H
#define INTELTOOL_H 1
#include <arch/mmio.h>
#include <commonlib/helpers.h>
#include <stdint.h>

4
util/inteltool/memory.c
View File

@ -261,8 +261,8 @@ int print_mchbar(struct pci_dev *nb, struct pci_access *pacc, const char *dump_s
printf("MCHBAR = 0x%08" PRIx64 " (MEM)\n\n", mchbar_phys);
for (i = 0; i < size; i += 4) {
if (*(uint32_t *)(mchbar + i))
printf("0x%04x: 0x%08"PRIx32"\n", i, *(uint32_t *)(mchbar+i));
if (read32(mchbar + i))
printf("0x%04x: 0x%08"PRIx32"\n", i, read32(mchbar+i));
}
switch (nb->device_id)

20
util/inteltool/pcie.c
View File

@ -298,8 +298,8 @@ int print_epbar(struct pci_dev *nb)
printf("EPBAR = 0x%08" PRIx64 " (MEM)\n\n", epbar_phys);
for (i = 0; i < size; i += 4) {
if (*(uint32_t *)(epbar + i))
printf("0x%04x: 0x%08x\n", i, *(uint32_t *)(epbar+i));
if (read32(epbar + i))
printf("0x%04x: 0x%08x\n", i, read32(epbar+i));
}
unmap_physical((void *)epbar, size);
@ -428,27 +428,27 @@ int print_dmibar(struct pci_dev *nb)
case 4:
printf("dmibase+0x%04x: 0x%08x (%s)\n",
dmi_registers[i].addr,
*(uint32_t *)(dmibar+dmi_registers[i].addr),
read32(dmibar+dmi_registers[i].addr),
dmi_registers[i].name);
break;
case 2:
printf("dmibase+0x%04x: 0x%04x (%s)\n",
dmi_registers[i].addr,
*(uint16_t *)(dmibar+dmi_registers[i].addr),
read16(dmibar+dmi_registers[i].addr),
dmi_registers[i].name);
break;
case 1:
printf("dmibase+0x%04x: 0x%02x (%s)\n",
dmi_registers[i].addr,
*(uint8_t *)(dmibar+dmi_registers[i].addr),
read8(dmibar+dmi_registers[i].addr),
dmi_registers[i].name);
break;
}
}
} else {
for (i = 0; i < size; i += 4) {
if (*(uint32_t *)(dmibar + i))
printf("0x%04x: 0x%08x\n", i, *(uint32_t *)(dmibar+i));
if (read32(dmibar + i))
printf("0x%04x: 0x%08x\n", i, read32(dmibar+i));
}
}
@ -567,12 +567,12 @@ int print_pciexbar(struct pci_dev *nb)
for (fn = 0; fn < 8; fn++) {
devbase = (bus * 1024 * 1024) + (dev * 32 * 1024) + (fn * 4 * 1024);
if (*(uint16_t *)(pciexbar + devbase) == 0xffff)
if (read16(pciexbar + devbase) == 0xffff)
continue;
/* This is a heuristics. Anyone got a better check? */
if( (*(uint32_t *)(pciexbar + devbase + 256) == 0xffffffff) &&
(*(uint32_t *)(pciexbar + devbase + 512) == 0xffffffff) ) {
if( (read32(pciexbar + devbase + 256) == 0xffffffff) &&
(read32(pciexbar + devbase + 512) == 0xffffffff) ) {
#if DEBUG
printf("Skipped non-PCIe device %02x:%02x.%01x\n", bus, dev, fn);
#endif

4
util/inteltool/powermgt.c
View File

@ -946,9 +946,9 @@ int print_pmbase(struct pci_dev *sb, struct pci_access *pacc)
printf("PWRMBASE = 0x%08" PRIx64 " (MEM)\n\n", pwrmbase_phys);
for (i = 0; i < pwrmbase_size; i += 4) {
if (*(uint32_t *)(pwrmbase + i))
if (read32(pwrmbase + i))
printf("0x%04zx: 0x%08"PRIx32"\n",
i, *(uint32_t *)(pwrmbase + i));
i, read32(pwrmbase + i));
}
unmap_physical((void *)pwrmbase, pwrmbase_size);

4
util/inteltool/rootcmplx.c
View File

@ -147,8 +147,8 @@ int print_rcba(struct pci_dev *sb)
printf("RCBA = 0x%08x (MEM)\n\n", rcba_phys);
for (i = 0; i < size; i += 4) {
if (*(uint32_t *)(rcba + i))
printf("0x%04x: 0x%08x\n", i, *(uint32_t *)(rcba + i));
if (read32(rcba + i))
printf("0x%04x: 0x%08x\n", i, read32(rcba + i));
}
unmap_physical((void *)rcba, size);

10
util/inteltool/spi.c
View File

@ -364,17 +364,17 @@ static int print_spibar(struct pci_dev *sb) {
for (i = 0; i < size; i++) {
switch(spi_register[i].size) {
case 1:
printf("0x%08x = %s\n", *(uint8_t *)(rcba + spibaroffset + spi_register[i].addr), spi_register[i].name);
printf("0x%08x = %s\n", read8(rcba + spibaroffset + spi_register[i].addr), spi_register[i].name);
break;
case 2:
printf("0x%08x = %s\n", *(uint16_t *)(rcba + spibaroffset + spi_register[i].addr), spi_register[i].name);
printf("0x%08x = %s\n", read16(rcba + spibaroffset + spi_register[i].addr), spi_register[i].name);
break;
case 4:
printf("0x%08x = %s\n", *(uint32_t *)(rcba + spibaroffset + spi_register[i].addr), spi_register[i].name);
printf("0x%08x = %s\n", read32(rcba + spibaroffset + spi_register[i].addr), spi_register[i].name);
break;
case 8:
printf("0x%08x%08x = %s\n", *(uint32_t *)(rcba + spibaroffset + spi_register[i].addr + 4),
*(uint32_t *)(rcba + spibaroffset + spi_register[i].addr), spi_register[i].name);
printf("0x%08x%08x = %s\n", read32(rcba + spibaroffset + spi_register[i].addr + 4),
read32(rcba + spibaroffset + spi_register[i].addr), spi_register[i].name);
break;
}
}