soc/cavium/cn81xx: Drop dead do_soft_reset() implementation
Change-Id: I85f357739220f16497f65df1bb317d9d6eb54d9f Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/29046 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
This commit is contained in:
parent
773cc1b413
commit
10d7845f09
|
@ -25,7 +25,6 @@ bootblock-y += timer.c
|
||||||
bootblock-y += spi.c
|
bootblock-y += spi.c
|
||||||
bootblock-y += uart.c
|
bootblock-y += uart.c
|
||||||
bootblock-y += cpu.c
|
bootblock-y += cpu.c
|
||||||
bootblock-y += reset.c
|
|
||||||
ifeq ($(CONFIG_BOOTBLOCK_CONSOLE),y)
|
ifeq ($(CONFIG_BOOTBLOCK_CONSOLE),y)
|
||||||
bootblock-$(CONFIG_DRIVERS_UART) += uart.c
|
bootblock-$(CONFIG_DRIVERS_UART) += uart.c
|
||||||
endif
|
endif
|
||||||
|
@ -40,7 +39,6 @@ verstage-y += timer.c
|
||||||
verstage-y += spi.c
|
verstage-y += spi.c
|
||||||
verstage-$(CONFIG_DRIVERS_UART) += uart.c
|
verstage-$(CONFIG_DRIVERS_UART) += uart.c
|
||||||
verstage-y += cbmem.c
|
verstage-y += cbmem.c
|
||||||
verstage-y += reset.c
|
|
||||||
|
|
||||||
################################################################################
|
################################################################################
|
||||||
# romstage
|
# romstage
|
||||||
|
@ -53,7 +51,6 @@ romstage-y += spi.c
|
||||||
romstage-y += uart.c
|
romstage-y += uart.c
|
||||||
romstage-$(CONFIG_DRIVERS_UART) += uart.c
|
romstage-$(CONFIG_DRIVERS_UART) += uart.c
|
||||||
romstage-y += cbmem.c
|
romstage-y += cbmem.c
|
||||||
romstage-y += reset.c
|
|
||||||
|
|
||||||
romstage-y += sdram.c
|
romstage-y += sdram.c
|
||||||
romstage-y += mmu.c
|
romstage-y += mmu.c
|
||||||
|
@ -74,7 +71,6 @@ ramstage-y += cpu.c
|
||||||
ramstage-y += cpu_secondary.S
|
ramstage-y += cpu_secondary.S
|
||||||
ramstage-y += ecam0.c
|
ramstage-y += ecam0.c
|
||||||
ramstage-y += cbmem.c
|
ramstage-y += cbmem.c
|
||||||
ramstage-y += reset.c
|
|
||||||
|
|
||||||
ramstage-$(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) += bl31_plat_params.c
|
ramstage-$(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) += bl31_plat_params.c
|
||||||
|
|
||||||
|
|
|
@ -62,7 +62,6 @@
|
||||||
|
|
||||||
/* RST */
|
/* RST */
|
||||||
#define RST_PF_BAR0 (0x87E006000000ULL + 0x1600)
|
#define RST_PF_BAR0 (0x87E006000000ULL + 0x1600)
|
||||||
#define RST_SOFT_RESET (RST_PF_BAR0 + 0x80ULL)
|
|
||||||
#define RST_PP_AVAILABLE (RST_PF_BAR0 + 0x138ULL)
|
#define RST_PP_AVAILABLE (RST_PF_BAR0 + 0x138ULL)
|
||||||
#define RST_PP_RESET (RST_PF_BAR0 + 0x140ULL)
|
#define RST_PP_RESET (RST_PF_BAR0 + 0x140ULL)
|
||||||
#define RST_PP_PENDING (RST_PF_BAR0 + 0x148ULL)
|
#define RST_PP_PENDING (RST_PF_BAR0 + 0x148ULL)
|
||||||
|
|
|
@ -1,23 +0,0 @@
|
||||||
/*
|
|
||||||
* This file is part of the coreboot project.
|
|
||||||
*
|
|
||||||
* Copyright 2018-present Facebook, Inc.
|
|
||||||
*
|
|
||||||
* This program is free software; you can redistribute it and/or modify
|
|
||||||
* it under the terms of the GNU General Public License as published by
|
|
||||||
* the Free Software Foundation; version 2 of the License.
|
|
||||||
*
|
|
||||||
* This program is distributed in the hope that it will be useful,
|
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
||||||
* GNU General Public License for more details.
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include <arch/io.h>
|
|
||||||
#include <soc/addressmap.h>
|
|
||||||
#include <reset.h>
|
|
||||||
|
|
||||||
void do_soft_reset(void)
|
|
||||||
{
|
|
||||||
write64((void *)RST_SOFT_RESET, 1);
|
|
||||||
}
|
|
Loading…
Reference in New Issue