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- Fix race condition in option_table.h generation by moving the include 

statement to those files that actually need it. This significantly 
  reduces the number of dependencies, so it's no longer extremely ugly to
  specify them manually (see the src/pc80/Makefile.inc portion)
- Add double include guards around option_table.h defines
- Also, drop the AMD DBM690T work around for the issue

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Myles Watson <mylesgw@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5838 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Stefan Reinauer 2010-09-25 10:40:47 +00:00 committed by Stefan Reinauer
parent ff492b1855
commit 10ec0fed8e
17 changed files with 52 additions and 21 deletions
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4
src/arch/i386/Makefile.inc
View File

@ -206,11 +206,11 @@ else
$(obj)/mainboard/$(MAINBOARDDIR)/ap_romstage.o: $(src)/mainboard/$(MAINBOARDDIR)/ap_romstage.c $(OPTION_TABLE_H)
@printf " CC $(subst $(obj)/,,$(@))\n"
$(CC) -MMD $(CFLAGS) -I$(src) -I. -c $(src)/mainboard/$(MAINBOARDDIR)/ap_romstage.c -o $@
$(CC) -MMD $(CFLAGS) -I$(src) -I. -I$(obj) -c $(src)/mainboard/$(MAINBOARDDIR)/ap_romstage.c -o $@
$(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(OPTION_TABLE_H) $(obj)/build.h
@printf " CC romstage.inc\n"
$(CC) -MMD $(CFLAGS) -D__PRE_RAM__ -I$(src) -I. -c -S $< -o $@
$(CC) -MMD $(CFLAGS) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@
$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc
@printf " POST romstage.inc\n"

3
src/cpu/amd/dualcore/dualcore.c
View File

@ -7,6 +7,9 @@
#include "cpu/amd/dualcore/dualcore_id.c"
#include <pc80/mc146818rtc.h>
#if CONFIG_HAVE_OPTION_TABLE
#include "option_table.h"
#endif
static inline unsigned get_core_num_in_bsp(unsigned nodeid)
{

4
src/cpu/amd/model_fxx/init_cpus.c
View File

@ -1,3 +1,7 @@
#if CONFIG_HAVE_OPTION_TABLE
#include "option_table.h"
#endif
//it takes the CONFIG_ENABLE_APIC_EXT_ID and CONFIG_APIC_ID_OFFSET and CONFIG_LIFT_BSP_APIC_ID
#ifndef SET_FIDVID
#if CONFIG_K8_REV_F_SUPPORT == 0

3
src/cpu/amd/quadcore/quadcore.c
View File

@ -20,6 +20,9 @@
#include <console/console.h>
#include <pc80/mc146818rtc.h>
#include <northbridge/amd/amdht/ht_wrapper.c>
#if CONFIG_HAVE_OPTION_TABLE
#include "option_table.h"
#endif
#ifndef SET_NB_CFG_54
#define SET_NB_CFG_54 1

8
src/include/pc80/mc146818rtc.h
View File

@ -81,14 +81,6 @@
#define PC_CKS_RANGE_END 45
#define PC_CKS_LOC 46
/* coreboot cmos checksum is usually only built over bytes 49..125
* LB_CKS_RANGE_START, LB_CKS_RANGE_END and LB_CKS_LOC are defined
* in option_table.h
*/
#if CONFIG_HAVE_OPTION_TABLE
#include <option_table.h>
#endif
#ifndef UTIL_BUILD_OPTION_TABLE
#include <arch/io.h>
static inline unsigned char cmos_read(unsigned char addr)

6
src/mainboard/amd/dbm690t/Kconfig
View File

@ -25,12 +25,6 @@ config MAINBOARD_DIR
string
default amd/dbm690t
# This is a temporary fix, and should be removed when the race condition for
# building option_table.h is fixed.
config WARNINGS_ARE_ERRORS
bool
default n
config DCACHE_RAM_BASE
hex
default 0xc8000

1
src/mainboard/kontron/986lcd-m/romstage.c
View File

@ -43,6 +43,7 @@
#include "superio/winbond/w83627thg/w83627thg.h"
#include <pc80/mc146818rtc.h>
#include "option_table.h"
#include <console/console.h>
#include <cpu/x86/bist.h>

3
src/northbridge/amd/amdk8/coherent_ht.c
View File

@ -69,6 +69,9 @@
#include <stdlib.h>
#include "arch/romcc_io.h"
#include <pc80/mc146818rtc.h>
#if CONFIG_HAVE_OPTION_TABLE
#include "option_table.h"
#endif
#include "amdk8.h"

3
src/northbridge/amd/amdk8/raminit.c
View File

@ -10,6 +10,9 @@
#include <reset.h>
#include "raminit.h"
#include "amdk8.h"
#if CONFIG_HAVE_OPTION_TABLE
#include "option_table.h"
#endif
#if (CONFIG_RAMTOP & (CONFIG_RAMTOP -1)) != 0
# error "CONFIG_RAMTOP must be a power of 2"

3
src/northbridge/amd/amdk8/raminit_f.c
View File

@ -28,6 +28,9 @@
#include "raminit.h"
#include "amdk8_f.h"
#include <spd_ddr2.h>
#if CONFIG_HAVE_OPTION_TABLE
#include "option_table.h"
#endif
#ifndef QRANK_DIMM_SUPPORT
#define QRANK_DIMM_SUPPORT 0

11
src/northbridge/intel/e7520/raminit.c
View File

@ -23,6 +23,9 @@
#include <stdlib.h>
#include "raminit.h"
#include "e7520.h"
#if CONFIG_HAVE_OPTION_TABLE
#include "option_table.h"
#endif
#define BAR 0x40000000
@ -619,11 +622,13 @@ static int spd_set_dram_controller_mode(const struct mem_controller *ctrl,
}
ecc = 2;
if (read_option(CMOS_VSTART_ECC_memory,CMOS_VLEN_ECC_memory,1) == 0) {
#if CONFIG_HAVE_OPTION_TABLE
if (read_option(CMOS_VSTART_ECC_memory, CMOS_VLEN_ECC_memory, 1) == 0) {
ecc = 0; /* ECC off in CMOS so disable it */
print_debug("ECC off\n");
}
else {
} else
#endif
{
print_debug("ECC on\n");
}
drc &= ~(3 << 20); /* clear the ecc bits */

9
src/northbridge/intel/e7525/raminit.c
View File

@ -23,6 +23,9 @@
#include <stdlib.h>
#include "raminit.h"
#include "e7525.h"
#if CONFIG_HAVE_OPTION_TABLE
#include "option_table.h"
#endif
#define BAR 0x40000000
@ -619,11 +622,13 @@ static int spd_set_dram_controller_mode(const struct mem_controller *ctrl,
}
ecc = 2;
#if CONFIG_HAVE_OPTION_TABLE
if (read_option(CMOS_VSTART_ECC_memory,CMOS_VLEN_ECC_memory,1) == 0) {
ecc = 0; /* ECC off in CMOS so disable it */
print_debug("ECC off\n");
}
else {
} else
#endif
{
print_debug("ECC on\n");
}
drc &= ~(3 << 20); /* clear the ecc bits */

1
src/pc80/Makefile.inc
View File

@ -8,3 +8,4 @@ initobj-$(CONFIG_CACHE_AS_RAM) += serial.o
subdirs-y += vga
$(obj)/pc80/mc146818rtc.o : $(OPTION_TABLE_H)
$(obj)/pc80/mc146818rtc_early.initobj.o : $(OPTION_TABLE_H)

3
src/pc80/mc146818rtc.c
View File

@ -2,6 +2,9 @@
#include <pc80/mc146818rtc.h>
#include <boot/coreboot_tables.h>
#include <string.h>
#if CONFIG_USE_OPTION_TABLE
#include "option_table.h"
#endif
/* control registers - Moto names
*/

3
src/pc80/mc146818rtc_early.c
View File

@ -1,5 +1,8 @@
#include <pc80/mc146818rtc.h>
#include <fallback.h>
#if CONFIG_USE_OPTION_TABLE
#include "option_table.h"
#endif
#ifndef CONFIG_MAX_REBOOT_CNT
#error "CONFIG_MAX_REBOOT_CNT not defined"

3
src/pc80/serial.c
View File

@ -1,6 +1,9 @@
#include <lib.h> /* Prototypes */
#include <arch/io.h>
#include "pc80/mc146818rtc.h"
#if CONFIG_USE_OPTION_TABLE
#include "option_table.h"
#endif
/* Base Address */
#ifndef CONFIG_TTYS0_BASE

5
util/options/build_opt_tbl.c
View File

@ -591,6 +591,10 @@ int main(int argc, char **argv)
/* Walk through the entry records */
ptr = (struct lb_record *)(cmos_table + hdr->header_length);
end = (struct lb_record *)(cmos_table + hdr->size);
fprintf(fp, "/* This file is autogenerated.\n"
" * See mainboard's cmos.layout file.\n */\n\n"
"#ifndef __OPTION_TABLE_H\n#define __OPTION_TABLE_H\n\n");
for(;ptr < end; ptr = (struct lb_record *)(((char *)ptr) + ptr->size)) {
if (ptr->tag != LB_TAG_OPTION) {
continue;
@ -620,6 +624,7 @@ int main(int argc, char **argv)
unlink(tempfilename);
exit(1);
}
fprintf(fp, "\n#endif // __OPTION_TABLE_H\n");
fclose(fp);
UNLINK_IF_NECESSARY(header);