mb/google/brya/variants/gimble: Correct I2C slave address and update gpio.c

1. According to the Maxim's comment and schematic diagram of proto, Modify I2C slave address to 0x38, 0x3c.
2. According to the schematic diagram of proto, Change GPD11 to NC.

BUG=b:191811888, b:1191213263
TEST=USE="project_gimble emerge-brya coreboot" and verify it builds
without error.

Signed-off-by: Mark Hsieh <mark_hsieh@wistron.corp-partner.google.com>
Change-Id: Ibf8adf2ed8dda9ae6da06e7e995bef9395cdee35
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57059
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Mark Hsieh 2021-08-20 16:59:57 +08:00 committed by Felix Held
parent a724077b79
commit 111bc431ce
2 changed files with 5 additions and 2 deletions

View File

@ -105,6 +105,9 @@ static const struct pad_config override_gpio_table[] = {
PAD_NC(GPP_S6, NONE),
/* S7 : SNDW3_DATA ==> NC */
PAD_NC(GPP_S7, NONE),
/* GPD11: LANPHYC ==> NC */
PAD_NC(GPD11, NONE),
};
/* Early pad configuration in bootblock */

View File

@ -108,7 +108,7 @@ chip soc/intel/alderlake
register "name" = ""MXW0""
register "r0_calib_key" = ""dsm_calib_r0_0""
register "temperature_calib_key" = ""dsm_calib_temp_0""
device i2c 0x70 on
device i2c 0x38 on
probe AUDIO MAX98390_ALC5682I_I2S
end
end
@ -118,7 +118,7 @@ chip soc/intel/alderlake
register "name" = ""MXW1""
register "r0_calib_key" = ""dsm_calib_r0_1""
register "temperature_calib_key" = ""dsm_calib_temp_1""
device i2c 0x72 on
device i2c 0x3c on
probe AUDIO MAX98390_ALC5682I_I2S
end
end