imgtec/pistachio: Use SYS PLL in integer mode
Use SYS PLL in integer mode by default to reduce jitter. DSMPD_MASK is defined and can be used to switch to fractional mode. Tested on pistachio bring up board. Change-Id: Ie6d2aca71c7af86b0993c804329e6d03e26ff754 Signed-off-by: Ionela Voinescu <ionela.voinescu@imgtec.com> Reviewed-on: https://review.coreboot.org/12767 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
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@ -27,13 +27,19 @@
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#define SYS_PLL_CTRL4_ADDR 0xB8144048
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#define SYS_PLL_CTRL4_ADDR 0xB8144048
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#define SYS_INTERNAL_PLL_BYPASS_MASK 0x10000000
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#define SYS_INTERNAL_PLL_BYPASS_MASK 0x10000000
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#define SYS_PLL_PD_CTRL_ADDR 0xB8144044
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#define SYS_PLL_PD_CTRL_ADDR 0xB8144044
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#define SYS_PLL_PD_CTRL_PD_MASK 0x0000003F
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#define SYS_PLL_PD_CTRL_PD_MASK 0x00000039
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#define SYS_PLL_DACPD_ADDR 0xB8144044
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#define SYS_PLL_DACPD_MASK 0x00000002
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#define SYS_PLL_DSMPD_ADDR 0xB8144044
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#define SYS_PLL_DSMPD_MASK 0x00000004
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#define MIPS_EXTERN_PLL_BYPASS_MASK 0x00000002
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#define MIPS_EXTERN_PLL_BYPASS_MASK 0x00000002
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#define MIPS_PLL_CTRL2_ADDR 0xB8144008
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#define MIPS_PLL_CTRL2_ADDR 0xB8144008
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#define MIPS_INTERNAL_PLL_BYPASS_MASK 0x10000000
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#define MIPS_INTERNAL_PLL_BYPASS_MASK 0x10000000
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#define MIPS_PLL_PD_CTRL_ADDR 0xB8144004
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#define MIPS_PLL_PD_CTRL_ADDR 0xB8144004
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#define MIPS_PLL_PD_CTRL_PD_MASK 0x0F000000
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#define MIPS_PLL_PD_CTRL_PD_MASK 0x0D000000
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#define MIPS_PLL_DSMPD_ADDR 0xB8144004
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#define MIPS_PLL_DSMPD_MASK 0x02000000
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/* Definitions for PLL dividers */
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/* Definitions for PLL dividers */
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#define SYS_PLL_POSTDIV_ADDR 0xB8144040
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#define SYS_PLL_POSTDIV_ADDR 0xB8144040
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@ -126,6 +132,10 @@ struct pll_parameters {
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u32 internal_bypass_mask;
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u32 internal_bypass_mask;
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u32 power_down_ctrl_addr;
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u32 power_down_ctrl_addr;
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u32 power_down_ctrl_mask;
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u32 power_down_ctrl_mask;
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u32 dacpd_addr;
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u32 dacpd_mask;
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u32 dsmpd_addr;
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u32 dsmpd_mask;
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u32 postdiv_addr;
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u32 postdiv_addr;
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u32 postdiv1_shift;
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u32 postdiv1_shift;
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u32 postdiv1_mask;
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u32 postdiv1_mask;
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@ -155,6 +165,14 @@ static struct pll_parameters pll_params[] = {
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.internal_bypass_mask = SYS_INTERNAL_PLL_BYPASS_MASK,
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.internal_bypass_mask = SYS_INTERNAL_PLL_BYPASS_MASK,
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.power_down_ctrl_addr = SYS_PLL_PD_CTRL_ADDR,
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.power_down_ctrl_addr = SYS_PLL_PD_CTRL_ADDR,
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.power_down_ctrl_mask = SYS_PLL_PD_CTRL_PD_MASK,
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.power_down_ctrl_mask = SYS_PLL_PD_CTRL_PD_MASK,
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/* Noise cancellation */
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.dacpd_addr = SYS_PLL_DACPD_ADDR,
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.dacpd_mask = SYS_PLL_DACPD_MASK,
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.dsmpd_addr = SYS_PLL_DSMPD_ADDR,
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/* 0 - Integer mode
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* SYS_PLL_DSMPD_MASK - Fractional mode
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*/
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.dsmpd_mask = 0,
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.postdiv_addr = SYS_PLL_POSTDIV_ADDR,
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.postdiv_addr = SYS_PLL_POSTDIV_ADDR,
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.postdiv1_shift = SYS_PLL_POSTDIV1_SHIFT,
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.postdiv1_shift = SYS_PLL_POSTDIV1_SHIFT,
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.postdiv1_mask = SYS_PLL_POSTDIV1_MASK,
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.postdiv1_mask = SYS_PLL_POSTDIV1_MASK,
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@ -178,6 +196,10 @@ static struct pll_parameters pll_params[] = {
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.internal_bypass_mask = MIPS_INTERNAL_PLL_BYPASS_MASK,
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.internal_bypass_mask = MIPS_INTERNAL_PLL_BYPASS_MASK,
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.power_down_ctrl_addr = MIPS_PLL_PD_CTRL_ADDR,
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.power_down_ctrl_addr = MIPS_PLL_PD_CTRL_ADDR,
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.power_down_ctrl_mask = MIPS_PLL_PD_CTRL_PD_MASK,
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.power_down_ctrl_mask = MIPS_PLL_PD_CTRL_PD_MASK,
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.dacpd_addr = 0,
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.dacpd_mask = 0,
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.dsmpd_addr = MIPS_PLL_DSMPD_ADDR,
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.dsmpd_mask = MIPS_PLL_DSMPD_MASK,
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.postdiv_addr = MIPS_PLL_POSTDIV_ADDR,
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.postdiv_addr = MIPS_PLL_POSTDIV_ADDR,
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.postdiv1_shift = MIPS_PLL_POSTDIV1_SHIFT,
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.postdiv1_shift = MIPS_PLL_POSTDIV1_SHIFT,
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.postdiv1_mask = MIPS_PLL_POSTDIV1_MASK,
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.postdiv1_mask = MIPS_PLL_POSTDIV1_MASK,
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@ -222,6 +244,20 @@ static int pll_setup(struct pll_parameters *param, u8 divider1, u8 divider2)
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reg &= ~(param->power_down_ctrl_mask);
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reg &= ~(param->power_down_ctrl_mask);
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write32(param->power_down_ctrl_addr, reg);
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write32(param->power_down_ctrl_addr, reg);
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/* Noise cancellation */
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if (param->dacpd_addr) {
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reg = read32(param->dacpd_addr);
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reg &= ~(param->dacpd_mask);
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write32(param->dacpd_addr, reg);
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}
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/* Functional mode */
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if (param->dsmpd_addr) {
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reg = read32(param->dsmpd_addr);
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reg &= ~(param->dsmpd_mask);
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write32(param->dsmpd_addr, reg);
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}
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if (param->feedback_addr) {
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if (param->feedback_addr) {
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assert(!((param->feedback << param->feedback_shift) &
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assert(!((param->feedback << param->feedback_shift) &
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~(param->feedback_mask)));
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~(param->feedback_mask)));
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