intel/fsp_rangeley: Indent '#define' consistently
The indentations of #define are not consistent in chip.h. Update to make all #define indentations being aligned and put them after the variable declaration. Change-Id: I37550acac18bac3efddb580ef6b956be0e2b357a Signed-off-by: York Yang <york.yang@intel.com> Reviewed-on: http://review.coreboot.org/8333 Reviewed-by: Dave Frodin <dave.frodin@se-eng.com> Tested-by: build bot (Jenkins)
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@ -52,21 +52,22 @@ struct northbridge_intel_fsp_rangeley_config {
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/* Enable the Rank Margin Tool, needs PrintDebugMessages */
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/* Enable the Rank Margin Tool, needs PrintDebugMessages */
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uint8_t MrcRmtSupport;
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uint8_t MrcRmtSupport;
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/* PCIe port bifurcation control */
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uint8_t Bifurcation;
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#define BIFURCATION_4_4_4_4 0
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#define BIFURCATION_4_4_4_4 0
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#define BIFURCATION_4_4_8 1
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#define BIFURCATION_4_4_8 1
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#define BIFURCATION_8_4_4 2
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#define BIFURCATION_8_4_4 2
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#define BIFURCATION_8_8 3
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#define BIFURCATION_8_8 3
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#define BIFURCATION_16 4
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#define BIFURCATION_16 4
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uint8_t Bifurcation;
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/* PCIe port de-emphasis control */
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/* PCIe port de-emphasis control */
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#define DE_EMPHASIS_DEFAULT 0
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#define DE_EMPHASIS_MINUS_6_0_DB 1
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#define DE_EMPHASIS_MINUS_3_5_DB 2
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uint8_t PcdPcieRootPort1DeEmphasis;
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uint8_t PcdPcieRootPort1DeEmphasis;
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uint8_t PcdPcieRootPort2DeEmphasis;
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uint8_t PcdPcieRootPort2DeEmphasis;
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uint8_t PcdPcieRootPort3DeEmphasis;
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uint8_t PcdPcieRootPort3DeEmphasis;
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uint8_t PcdPcieRootPort4DeEmphasis;
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uint8_t PcdPcieRootPort4DeEmphasis;
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#define DE_EMPHASIS_DEFAULT 0
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#define DE_EMPHASIS_MINUS_6_0_DB 1
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#define DE_EMPHASIS_MINUS_3_5_DB 2
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};
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};
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#endif
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#endif
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