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Patch to util/inteltool: 

* PMBASE dumping now knows the registers.
* Add support for i965, i975, ICH8M
* Add support for Darwin OS using DirectIO

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3794 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Stefan Reinauer 2008-12-04 15:18:20 +00:00 committed by Stefan Reinauer
parent fcf9be3b93
commit 1162f25a49
9 changed files with 308 additions and 75 deletions
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35
util/inteltool/Makefile
View File

@ -29,6 +29,13 @@ LDFLAGS = -lpci -lz
OBJS = inteltool.o cpu.o gpio.o rootcmplx.o powermgt.o memory.o pcie.o OBJS = inteltool.o cpu.o gpio.o rootcmplx.o powermgt.o memory.o pcie.o
OS_ARCH = $(shell uname)
ifeq ($(OS_ARCH), Darwin)
CFLAGS += -DDARWIN -I/usr/local/include
LDFLAGS = -framework IOKit -framework DirectIO -L/usr/local/lib -lpci -lz
# OBJS += darwinio.o
endif
all: pciutils dep $(PROGRAM) all: pciutils dep $(PROGRAM)
$(PROGRAM): $(OBJS) $(PROGRAM): $(OBJS)
@ -41,25 +48,25 @@ distclean: clean
rm -f .dependencies rm -f .dependencies
dep: dep:
@$(CC) -MM *.c > .dependencies @$(CC) $(CFLAGS) -MM *.c > .dependencies
pciutils: pciutils:
@echo; echo -n "Checking for pciutils and zlib... " @printf "\nChecking for pciutils and zlib... "
@$(shell ( echo "#include <pci/pci.h>"; \ @$(shell ( printf "#include <pci/pci.h>\n"; \
echo "struct pci_access *pacc;"; \ printf "struct pci_access *pacc;\n"; \
echo "int main(int argc, char **argv)"; \ printf "int main(int argc, char **argv)\n"; \
echo "{ pacc = pci_alloc(); return 0; }"; ) > .test.c ) printf "{ pacc = pci_alloc(); return 0; }\n"; ) > .test.c )
@$(CC) $(CFLAGS) .test.c -o .test $(LDFLAGS) &>/dev/null && \ @$(CC) $(CFLAGS) .test.c -o .test $(LDFLAGS) &>/dev/null && \
echo "found." || ( echo "not found."; echo; \ printf "found.\n" || ( printf "not found.\n\n"; \
echo "Please install pciutils-devel and zlib-devel."; \ printf "Please install pciutils-devel and zlib-devel.\n"; \
echo "See README for more information."; echo; \ printf "See README for more information.\n\n"; \
rm -f .test.c .test; exit 1) rm -f .test.c .test; exit 1)
@rm -f .test.c .test @rm -rf .test.c .test .test.dSYM
install: $(PROGRAM) install: $(PROGRAM)
$(INSTALL) $(PROGRAM) $(PREFIX)/sbin $(INSTALL) $(PROGRAM) $(DESTDIR)$(PREFIX)/sbin
mkdir -p $(PREFIX)/share/man/man8 mkdir -p $(DESTDIR)$(PREFIX)/share/man/man8
$(INSTALL) $(PROGRAM).8 $(PREFIX)/share/man/man8 $(INSTALL) $(PROGRAM).8 $(DESTDIR)$(PREFIX)/share/man/man8
.PHONY: all clean distclean dep pciutils .PHONY: all clean distclean dep pciutils

21
util/inteltool/cpu.c
View File

@ -33,13 +33,18 @@ unsigned int cpuid(unsigned int op)
unsigned int ret; unsigned int ret;
unsigned int dummy2, dummy3, dummy4; unsigned int dummy2, dummy3, dummy4;
asm volatile ( asm volatile (
"cpuid" "pushl %%ebx \n"
: "=a" (ret), "=b" (dummy2), "=c" (dummy3), "=d" (dummy4) "cpuid \n"
"movl %%ebx, %1 \n"
"popl %%ebx \n"
: "=a" (ret), "=r" (dummy2), "=c" (dummy3), "=d" (dummy4)
: "a" (op) : "a" (op)
: "cc"
); );
return ret; return ret;
} }
#ifndef DARWIN
int msr_readerror = 0; int msr_readerror = 0;
msr_t rdmsr(int addr) msr_t rdmsr(int addr)
@ -72,6 +77,7 @@ msr_t rdmsr(int addr)
return msr; return msr;
} }
#endif
int print_intel_core_msrs(void) int print_intel_core_msrs(void)
{ {
@ -273,12 +279,14 @@ int print_intel_core_msrs(void)
return -1; return -1;
} }
#ifndef DARWIN
fd_msr = open("/dev/cpu/0/msr", O_RDWR); fd_msr = open("/dev/cpu/0/msr", O_RDWR);
if (fd_msr < 0) { if (fd_msr < 0) {
perror("Error while opening /dev/cpu/0/msr"); perror("Error while opening /dev/cpu/0/msr");
printf("Did you run 'modprobe msr'?\n"); printf("Did you run 'modprobe msr'?\n");
return -1; return -1;
} }
#endif
printf("\n===================== SHARED MSRs (All Cores) =====================\n"); printf("\n===================== SHARED MSRs (All Cores) =====================\n");
@ -292,6 +300,7 @@ int print_intel_core_msrs(void)
close(fd_msr); close(fd_msr);
for (core = 0; core < 8; core++) { for (core = 0; core < 8; core++) {
#ifndef DARWIN
char msrfilename[64]; char msrfilename[64];
memset(msrfilename, 0, 64); memset(msrfilename, 0, 64);
sprintf(msrfilename, "/dev/cpu/%d/msr", core); sprintf(msrfilename, "/dev/cpu/%d/msr", core);
@ -303,7 +312,7 @@ int print_intel_core_msrs(void)
*/ */
if (fd_msr < 0) if (fd_msr < 0)
break; break;
#endif
printf("\n====================== UNIQUE MSRs (core %d) ======================\n", core); printf("\n====================== UNIQUE MSRs (core %d) ======================\n", core);
for (i = 0; i < cpu->num_per_core_msrs; i++) { for (i = 0; i < cpu->num_per_core_msrs; i++) {
@ -312,13 +321,15 @@ int print_intel_core_msrs(void)
cpu->per_core_msrs[i].number, msr.hi, msr.lo, cpu->per_core_msrs[i].number, msr.hi, msr.lo,
cpu->per_core_msrs[i].name); cpu->per_core_msrs[i].name);
} }
#ifndef DARWIN
close(fd_msr); close(fd_msr);
#endif
} }
#ifndef DARWIN
if (msr_readerror) if (msr_readerror)
printf("\n(*) Some MSRs could not be read. The marked values are unreliable.\n"); printf("\n(*) Some MSRs could not be read. The marked values are unreliable.\n");
#endif
return 0; return 0;
} }

26
util/inteltool/gpio.c
View File

@ -18,7 +18,6 @@
*/ */
#include <stdio.h> #include <stdio.h>
#include <sys/io.h>
#include "inteltool.h" #include "inteltool.h"
static const io_register_t ich0_gpio_registers[] = { static const io_register_t ich0_gpio_registers[] = {
@ -78,6 +77,26 @@ static const io_register_t ich7_gpio_registers[] = {
{ 0x3C, 4, "RESERVED" } { 0x3C, 4, "RESERVED" }
}; };
static const io_register_t ich8_gpio_registers[] = {
{ 0x00, 4, "GPIO_USE_SEL" },
{ 0x04, 4, "GP_IO_SEL" },
{ 0x08, 4, "RESERVED" },
{ 0x0c, 4, "GP_LVL" },
{ 0x10, 4, "GPIO_USE_SEL Override (LOW)" },
{ 0x14, 4, "RESERVED" },
{ 0x18, 4, "GPO_BLINK" },
{ 0x1c, 4, "GP_SER_BLINK" },
{ 0x20, 4, "GP_SB_CMDSTS" },
{ 0x24, 4, "GP_SB_DATA" },
{ 0x28, 4, "RESERVED" },
{ 0x2c, 4, "GPI_INV" },
{ 0x30, 4, "GPIO_USE_SEL2" },
{ 0x34, 4, "GP_IO_SEL2" },
{ 0x38, 4, "GP_LVL2" },
{ 0x3C, 4, "GPIO_USE_SEL Override (HIGH)" }
};
int print_gpios(struct pci_dev *sb) int print_gpios(struct pci_dev *sb)
{ {
int i, size; int i, size;
@ -87,6 +106,11 @@ int print_gpios(struct pci_dev *sb)
printf("\n============= GPIOS =============\n\n"); printf("\n============= GPIOS =============\n\n");
switch (sb->device_id) { switch (sb->device_id) {
case PCI_DEVICE_ID_INTEL_ICH8M:
gpiobase = pci_read_word(sb, 0x48) & 0xfffc;
gpio_registers = ich8_gpio_registers;
size = ARRAY_SIZE(ich8_gpio_registers);
break;
case PCI_DEVICE_ID_INTEL_ICH7: case PCI_DEVICE_ID_INTEL_ICH7:
case PCI_DEVICE_ID_INTEL_ICH7M: case PCI_DEVICE_ID_INTEL_ICH7M:
case PCI_DEVICE_ID_INTEL_ICH7DH: case PCI_DEVICE_ID_INTEL_ICH7DH:

32
util/inteltool/inteltool.c
View File

@ -21,9 +21,8 @@
#include <stdio.h> #include <stdio.h>
#include <stdlib.h> #include <stdlib.h>
#include <getopt.h> #include <getopt.h>
#include <sys/io.h>
#include <fcntl.h> #include <fcntl.h>
#include <sys/mman.h>
#include "inteltool.h" #include "inteltool.h"
static const struct { static const struct {
@ -33,6 +32,9 @@ static const struct {
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82845, "i845" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82845, "i845" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82945P, "i945P" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82945P, "i945P" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82945GM, "i945GM" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82945GM, "i945GM" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PM965, "PM965" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82975X, "i975X" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH8M, "ICH8-M" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7MDH, "ICH7-M DH" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7MDH, "ICH7-M DH" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7M, "ICH7-M" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7M, "ICH7-M" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7, "ICH7" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7, "ICH7" },
@ -44,7 +46,29 @@ static const struct {
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH, "ICH" } { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH, "ICH" }
}; };
int fd_mem; #ifndef DARWIN
static int fd_mem;
void *map_physical(unsigned long phys_addr, int len)
{
void *virt_addr;
virt_addr = mmap(0, len, PROT_WRITE | PROT_READ, MAP_SHARED,
fd_mem, (off_t) phys_addr);
if (virt_addr == MAP_FAILED) {
printf("Error mapping physical memory 0x%08x[0x%x]\n", phys_addr, len);
return NULL;
}
return virt_addr;
}
void unmap_physical(void *virt_addr, int len)
{
munmap(virt_addr, len);
}
#endif
void print_version(void) void print_version(void)
{ {
@ -164,10 +188,12 @@ int main(int argc, char *argv[])
exit(1); exit(1);
} }
#ifndef DARWIN
if ((fd_mem = open("/dev/mem", O_RDWR)) < 0) { if ((fd_mem = open("/dev/mem", O_RDWR)) < 0) {
perror("Can not open /dev/mem"); perror("Can not open /dev/mem");
exit(1); exit(1);
} }
#endif
pacc = pci_alloc(); pacc = pci_alloc();
pci_init(pacc); pci_init(pacc);

16
util/inteltool/inteltool.h
View File

@ -18,6 +18,14 @@
*/ */
#include <stdint.h> #include <stdint.h>
#ifndef DARWIN
#include <sys/io.h>
#else
/* DirectIO is available here:
* http://www.coresystems.de/en/directio
*/
#include <DirectIO/darwinio.h>
#endif
#include <pci/pci.h> #include <pci/pci.h>
#define INTELTOOL_VERSION "1.0" #define INTELTOOL_VERSION "1.0"
@ -33,17 +41,23 @@
#define PCI_DEVICE_ID_INTEL_ICH7 0x27b8 #define PCI_DEVICE_ID_INTEL_ICH7 0x27b8
#define PCI_DEVICE_ID_INTEL_ICH7M 0x27b9 #define PCI_DEVICE_ID_INTEL_ICH7M 0x27b9
#define PCI_DEVICE_ID_INTEL_ICH7MDH 0x27bd #define PCI_DEVICE_ID_INTEL_ICH7MDH 0x27bd
#define PCI_DEVICE_ID_INTEL_ICH8M 0x2815
#define PCI_DEVICE_ID_INTEL_82845 0x1a30 #define PCI_DEVICE_ID_INTEL_82845 0x1a30
#define PCI_DEVICE_ID_INTEL_82945P 0x2770 #define PCI_DEVICE_ID_INTEL_82945P 0x2770
#define PCI_DEVICE_ID_INTEL_82945GM 0x27a0 #define PCI_DEVICE_ID_INTEL_82945GM 0x27a0
#define PCI_DEVICE_ID_INTEL_PM965 0x2a00
#define PCI_DEVICE_ID_INTEL_82975X 0x277c
#define ARRAY_SIZE(a) ((int)(sizeof(a) / sizeof((a)[0]))) #define ARRAY_SIZE(a) ((int)(sizeof(a) / sizeof((a)[0])))
#ifndef DARWIN
typedef struct { uint32_t hi, lo; } msr_t; typedef struct { uint32_t hi, lo; } msr_t;
#endif
typedef struct { uint16_t addr; int size; char *name; } io_register_t; typedef struct { uint16_t addr; int size; char *name; } io_register_t;
extern int fd_mem; void *map_physical(unsigned long phys_addr, int len);
void unmap_physical(void *virt_addr, int len);
unsigned int cpuid(unsigned int op); unsigned int cpuid(unsigned int op);
int print_intel_core_msrs(void); int print_intel_core_msrs(void);

18
util/inteltool/memory.c
View File

@ -20,8 +20,6 @@
#include <stdio.h> #include <stdio.h>
#include <stdlib.h> #include <stdlib.h>
#include <sys/mman.h>
#include "inteltool.h" #include "inteltool.h"
/* /*
@ -31,15 +29,20 @@ int print_mchbar(struct pci_dev *nb)
{ {
int i, size = (16 * 1024); int i, size = (16 * 1024);
volatile uint8_t *mchbar; volatile uint8_t *mchbar;
uint32_t mchbar_phys; uint64_t mchbar_phys;
printf("\n============= MCHBAR ============\n\n"); printf("\n============= MCHBAR ============\n\n");
switch (nb->device_id) { switch (nb->device_id) {
case PCI_DEVICE_ID_INTEL_82945GM: case PCI_DEVICE_ID_INTEL_82945GM:
case PCI_DEVICE_ID_INTEL_82945P: case PCI_DEVICE_ID_INTEL_82945P:
case PCI_DEVICE_ID_INTEL_82975X:
mchbar_phys = pci_read_long(nb, 0x44) & 0xfffffffe; mchbar_phys = pci_read_long(nb, 0x44) & 0xfffffffe;
break; break;
case PCI_DEVICE_ID_INTEL_PM965:
mchbar_phys = pci_read_long(nb, 0x48) & 0xfffffffe;
mchbar_phys |= ((uint64_t)pci_read_long(nb, 0x4c)) << 32;
break;
case 0x1234: // Dummy for non-existent functionality case 0x1234: // Dummy for non-existent functionality
printf("This northbrigde does not have MCHBAR.\n"); printf("This northbrigde does not have MCHBAR.\n");
return 1; return 1;
@ -48,22 +51,21 @@ int print_mchbar(struct pci_dev *nb)
return 1; return 1;
} }
mchbar = mmap(0, size, PROT_WRITE | PROT_READ, MAP_SHARED, mchbar = map_physical(mchbar_phys, size);
fd_mem, (off_t) mchbar_phys);
if (mchbar == MAP_FAILED) { if (mchbar == NULL) {
perror("Error mapping MCHBAR"); perror("Error mapping MCHBAR");
exit(1); exit(1);
} }
printf("MCHBAR = 0x%08x (MEM)\n\n", mchbar_phys); printf("MCHBAR = 0x%08llx (MEM)\n\n", mchbar_phys);
for (i = 0; i < size; i += 4) { for (i = 0; i < size; i += 4) {
if (*(uint32_t *)(mchbar + i)) if (*(uint32_t *)(mchbar + i))
printf("0x%04x: 0x%08x\n", i, *(uint32_t *)(mchbar+i)); printf("0x%04x: 0x%08x\n", i, *(uint32_t *)(mchbar+i));
} }
munmap((void *)mchbar, size); unmap_physical((void *)mchbar, size);
return 0; return 0;
} }

58
util/inteltool/pcie.c
View File

@ -19,8 +19,6 @@
#include <stdio.h> #include <stdio.h>
#include <stdlib.h> #include <stdlib.h>
#include <sys/mman.h>
#include "inteltool.h" #include "inteltool.h"
/* /*
@ -30,15 +28,20 @@ int print_epbar(struct pci_dev *nb)
{ {
int i, size = (4 * 1024); int i, size = (4 * 1024);
volatile uint8_t *epbar; volatile uint8_t *epbar;
uint32_t epbar_phys; uint64_t epbar_phys;
printf("\n============= EPBAR =============\n\n"); printf("\n============= EPBAR =============\n\n");
switch (nb->device_id) { switch (nb->device_id) {
case PCI_DEVICE_ID_INTEL_82945GM: case PCI_DEVICE_ID_INTEL_82945GM:
case PCI_DEVICE_ID_INTEL_82945P: case PCI_DEVICE_ID_INTEL_82945P:
case PCI_DEVICE_ID_INTEL_82975X:
epbar_phys = pci_read_long(nb, 0x40) & 0xfffffffe; epbar_phys = pci_read_long(nb, 0x40) & 0xfffffffe;
break; break;
case PCI_DEVICE_ID_INTEL_PM965:
epbar_phys = pci_read_long(nb, 0x40) & 0xfffffffe;
epbar_phys |= ((uint64_t)pci_read_long(nb, 0x44)) << 32;
break;
case 0x1234: // Dummy for non-existent functionality case 0x1234: // Dummy for non-existent functionality
printf("This northbrigde does not have EPBAR.\n"); printf("This northbrigde does not have EPBAR.\n");
return 1; return 1;
@ -47,21 +50,20 @@ int print_epbar(struct pci_dev *nb)
return 1; return 1;
} }
epbar = mmap(0, size, PROT_WRITE | PROT_READ, MAP_SHARED, epbar = map_physical(epbar_phys, size);
fd_mem, (off_t) epbar_phys);
if (epbar == MAP_FAILED) { if (epbar == NULL) {
perror("Error mapping EPBAR"); perror("Error mapping EPBAR");
exit(1); exit(1);
} }
printf("EPBAR = 0x%08x (MEM)\n\n", epbar_phys); printf("EPBAR = 0x%08llx (MEM)\n\n", epbar_phys);
for (i = 0; i < size; i += 4) { for (i = 0; i < size; i += 4) {
if (*(uint32_t *)(epbar + i)) if (*(uint32_t *)(epbar + i))
printf("0x%04x: 0x%08x\n", i, *(uint32_t *)(epbar+i)); printf("0x%04x: 0x%08x\n", i, *(uint32_t *)(epbar+i));
} }
munmap((void *)epbar, size); unmap_physical((void *)epbar, size);
return 0; return 0;
} }
@ -72,15 +74,20 @@ int print_dmibar(struct pci_dev *nb)
{ {
int i, size = (4 * 1024); int i, size = (4 * 1024);
volatile uint8_t *dmibar; volatile uint8_t *dmibar;
uint32_t dmibar_phys; uint64_t dmibar_phys;
printf("\n============= DMIBAR ============\n\n"); printf("\n============= DMIBAR ============\n\n");
switch (nb->device_id) { switch (nb->device_id) {
case PCI_DEVICE_ID_INTEL_82945GM: case PCI_DEVICE_ID_INTEL_82945GM:
case PCI_DEVICE_ID_INTEL_82945P: case PCI_DEVICE_ID_INTEL_82945P:
case PCI_DEVICE_ID_INTEL_82975X:
dmibar_phys = pci_read_long(nb, 0x4c) & 0xfffffffe; dmibar_phys = pci_read_long(nb, 0x4c) & 0xfffffffe;
break; break;
case PCI_DEVICE_ID_INTEL_PM965:
dmibar_phys = pci_read_long(nb, 0x68) & 0xfffffffe;
dmibar_phys |= ((uint64_t)pci_read_long(nb, 0x6c)) << 32;
break;
case 0x1234: // Dummy for non-existent functionality case 0x1234: // Dummy for non-existent functionality
printf("This northbrigde does not have DMIBAR.\n"); printf("This northbrigde does not have DMIBAR.\n");
return 1; return 1;
@ -89,21 +96,20 @@ int print_dmibar(struct pci_dev *nb)
return 1; return 1;
} }
dmibar = mmap(0, size, PROT_WRITE | PROT_READ, MAP_SHARED, dmibar = map_physical(dmibar_phys, size);
fd_mem, (off_t) dmibar_phys);
if (dmibar == MAP_FAILED) { if (dmibar == NULL) {
perror("Error mapping DMIBAR"); perror("Error mapping DMIBAR");
exit(1); exit(1);
} }
printf("DMIBAR = 0x%08x (MEM)\n\n", dmibar_phys); printf("DMIBAR = 0x%08llx (MEM)\n\n", dmibar_phys);
for (i = 0; i < size; i += 4) { for (i = 0; i < size; i += 4) {
if (*(uint32_t *)(dmibar + i)) if (*(uint32_t *)(dmibar + i))
printf("0x%04x: 0x%08x\n", i, *(uint32_t *)(dmibar+i)); printf("0x%04x: 0x%08x\n", i, *(uint32_t *)(dmibar+i));
} }
munmap((void *)dmibar, size); unmap_physical((void *)dmibar, size);
return 0; return 0;
} }
@ -112,8 +118,8 @@ int print_dmibar(struct pci_dev *nb)
*/ */
int print_pciexbar(struct pci_dev *nb) int print_pciexbar(struct pci_dev *nb)
{ {
uint32_t pciexbar_reg; uint64_t pciexbar_reg;
uint32_t pciexbar_phys; uint64_t pciexbar_phys;
volatile uint8_t *pciexbar; volatile uint8_t *pciexbar;
int max_busses, devbase, i; int max_busses, devbase, i;
int bus, dev, fn; int bus, dev, fn;
@ -123,8 +129,13 @@ int print_pciexbar(struct pci_dev *nb)
switch (nb->device_id) { switch (nb->device_id) {
case PCI_DEVICE_ID_INTEL_82945GM: case PCI_DEVICE_ID_INTEL_82945GM:
case PCI_DEVICE_ID_INTEL_82945P: case PCI_DEVICE_ID_INTEL_82945P:
case PCI_DEVICE_ID_INTEL_82975X:
pciexbar_reg = pci_read_long(nb, 0x48); pciexbar_reg = pci_read_long(nb, 0x48);
break; break;
case PCI_DEVICE_ID_INTEL_PM965:
pciexbar_reg = pci_read_long(nb, 0x60);
pciexbar_reg |= ((uint64_t)pci_read_long(nb, 0x64)) << 32;
break;
case 0x1234: // Dummy for non-existent functionality case 0x1234: // Dummy for non-existent functionality
printf("Error: This northbrigde does not have PCIEXBAR.\n"); printf("Error: This northbrigde does not have PCIEXBAR.\n");
return 1; return 1;
@ -140,15 +151,15 @@ int print_pciexbar(struct pci_dev *nb)
switch ((pciexbar_reg >> 1) & 3) { switch ((pciexbar_reg >> 1) & 3) {
case 0: // 256MB case 0: // 256MB
pciexbar_phys = pciexbar_reg & ((1 << 31)|(1 << 30)|(1 << 29)|(1 << 28)); pciexbar_phys = pciexbar_reg & (0xff << 28);
max_busses = 256; max_busses = 256;
break; break;
case 1: // 128M case 1: // 128M
pciexbar_phys = pciexbar_reg & ((1 << 31)|(1 << 30)|(1 << 29)|(1 << 28)|(1 << 27)); pciexbar_phys = pciexbar_reg & (0x1ff << 27);
max_busses = 128; max_busses = 128;
break; break;
case 2: // 64M case 2: // 64M
pciexbar_phys = pciexbar_reg & ((1 << 31)|(1 << 30)|(1 << 29)|(1 << 28)|(1 << 27)|(1 << 26)); pciexbar_phys = pciexbar_reg & (0x3ff << 26);
max_busses = 64; max_busses = 64;
break; break;
default: // RSVD default: // RSVD
@ -156,12 +167,11 @@ int print_pciexbar(struct pci_dev *nb)
return 1; return 1;
} }
printf("PCIEXBAR: 0x%08x\n", pciexbar_phys); printf("PCIEXBAR: 0x%08llx\n", pciexbar_phys);
pciexbar = mmap(0, (max_busses * 1024 * 1024), PROT_WRITE | PROT_READ, pciexbar = map_physical(pciexbar_phys, (max_busses * 1024 * 1024));
MAP_SHARED, fd_mem, (off_t) pciexbar_phys);
if (pciexbar == MAP_FAILED) { if (pciexbar == NULL) {
perror("Error mapping PCIEXBAR"); perror("Error mapping PCIEXBAR");
exit(1); exit(1);
} }
@ -194,7 +204,7 @@ int print_pciexbar(struct pci_dev *nb)
} }
} }
munmap((void *)pciexbar, (max_busses * 1024 * 1024)); unmap_physical((void *)pciexbar, (max_busses * 1024 * 1024));
return 0; return 0;
} }

159
util/inteltool/powermgt.c
View File

@ -19,14 +19,137 @@
*/ */
#include <stdio.h> #include <stdio.h>
#include <sys/io.h>
#include "inteltool.h" #include "inteltool.h"
static const io_register_t ich7_pm_registers[] = {
{ 0x00, 2, "PM1_STS" },
{ 0x02, 2, "PM1_EN" },
{ 0x04, 4, "PM1_CNT" },
{ 0x08, 4, "PM1_TMR" },
{ 0x0c, 4, "RESERVED" },
{ 0x10, 4, "PROC_CNT" },
#if DANGEROUS_REGISTERS
/* These registers return 0 on read, but reading them may cause
* the system to enter C2/C3/C4 state, which might hang the system.
*/
{ 0x14, 1, "LV2 (Mobile/Ultra Mobile)" },
{ 0x15, 1, "LV3 (Mobile/Ultra Mobile)" },
{ 0x16, 1, "LV4 (Mobile/Ultra Mobile)" },
#endif
{ 0x17, 1, "RESERVED" },
{ 0x18, 4, "RESERVED" },
{ 0x1c, 4, "RESERVED" },
{ 0x20, 1, "PM2_CNT (Mobile/Ultra Mobile)" },
{ 0x21, 1, "RESERVED" },
{ 0x22, 2, "RESERVED" },
{ 0x24, 4, "RESERVED" },
{ 0x28, 4, "GPE0_STS" },
{ 0x2C, 4, "GPE0_EN" },
{ 0x30, 4, "SMI_EN" },
{ 0x34, 4, "SMI_STS" },
{ 0x38, 2, "ALT_GP_SMI_EN" },
{ 0x3a, 2, "ALT_GP_SMI_STS" },
{ 0x3c, 4, "RESERVED" },
{ 0x40, 2, "RESERVED" },
{ 0x42, 1, "GPE_CNTL" },
{ 0x43, 1, "RESERVED" },
{ 0x44, 2, "DEVACT_STS" },
{ 0x46, 2, "RESERVED" },
{ 0x48, 4, "RESERVED" },
{ 0x4c, 4, "RESERVED" },
{ 0x50, 1, "SS_CNT (Mobile/Ultra Mobile)" },
{ 0x51, 1, "RESERVED" },
{ 0x52, 2, "RESERVED" },
{ 0x54, 4, "C3_RES (Mobile/Ultra Mobile)" },
{ 0x58, 4, "RESERVED" },
{ 0x5c, 4, "RESERVED" },
/* Here start the TCO registers */
{ 0x60, 2, "TCO_RLD" },
{ 0x62, 1, "TCO_DAT_IN" },
{ 0x63, 1, "TCO_DAT_OUT" },
{ 0x64, 2, "TCO1_STS" },
{ 0x66, 2, "TCO2_STS" },
{ 0x68, 2, "TCO1_CNT" },
{ 0x6a, 2, "TCO2_CNT" },
{ 0x6c, 2, "TCO_MESSAGE" },
{ 0x6e, 1, "TCO_WDCNT" },
{ 0x6f, 1, "RESERVED" },
{ 0x70, 1, "SW_IRQ_GEN" },
{ 0x71, 1, "RESERVED" },
{ 0x72, 2, "TCO_TMR" },
{ 0x74, 4, "RESERVED" },
{ 0x78, 4, "RESERVED" },
{ 0x7c, 4, "RESERVED" },
};
static const io_register_t ich8_pm_registers[] = {
{ 0x00, 2, "PM1_STS" },
{ 0x02, 2, "PM1_EN" },
{ 0x04, 4, "PM1_CNT" },
{ 0x08, 4, "PM1_TMR" },
{ 0x0c, 4, "RESERVED" },
{ 0x10, 4, "PROC_CNT" },
#if DANGEROUS_REGISTERS
/* These registers return 0 on read, but reading them may cause
* the system to enter Cx states, which might hang the system.
*/
{ 0x14, 1, "LV2 (Mobile)" },
{ 0x15, 1, "LV3 (Mobile)" },
{ 0x16, 1, "LV4 (Mobile)" },
{ 0x17, 1, "LV5 (Mobile)" },
{ 0x18, 1, "LV6 (Mobile)" },
#endif
{ 0x19, 1, "RESERVED" },
{ 0x1a, 2, "RESERVED" },
{ 0x1c, 4, "RESERVED" },
{ 0x20, 1, "PM2_CNT (Mobile)" },
{ 0x21, 1, "RESERVED" },
{ 0x22, 2, "RESERVED" },
{ 0x24, 4, "RESERVED" },
{ 0x28, 4, "GPE0_STS" },
{ 0x2C, 4, "GPE0_EN" },
{ 0x30, 4, "SMI_EN" },
{ 0x34, 4, "SMI_STS" },
{ 0x38, 2, "ALT_GP_SMI_EN" },
{ 0x3a, 2, "ALT_GP_SMI_STS" },
{ 0x3c, 4, "RESERVED" },
{ 0x40, 2, "RESERVED" },
{ 0x42, 1, "GPE_CNTL" },
{ 0x43, 1, "RESERVED" },
{ 0x44, 2, "DEVACT_STS" },
{ 0x46, 2, "RESERVED" },
{ 0x48, 4, "RESERVED" },
{ 0x4c, 4, "RESERVED" },
{ 0x50, 1, "SS_CNT (Mobile)" },
{ 0x51, 1, "RESERVED" },
{ 0x52, 2, "RESERVED" },
{ 0x54, 4, "C3_RES (Mobile)" },
{ 0x58, 4, "C5_RES (Mobile)" },
{ 0x5c, 4, "RESERVED" },
/* Here start the TCO registers */
{ 0x60, 2, "TCO_RLD" },
{ 0x62, 1, "TCO_DAT_IN" },
{ 0x63, 1, "TCO_DAT_OUT" },
{ 0x64, 2, "TCO1_STS" },
{ 0x66, 2, "TCO2_STS" },
{ 0x68, 2, "TCO1_CNT" },
{ 0x6a, 2, "TCO2_CNT" },
{ 0x6c, 2, "TCO_MESSAGE" },
{ 0x6e, 1, "TCO_WDCNT" },
{ 0x6f, 1, "RESERVED" },
{ 0x70, 1, "SW_IRQ_GEN" },
{ 0x71, 1, "RESERVED" },
{ 0x72, 2, "TCO_TMR" },
{ 0x74, 4, "RESERVED" },
{ 0x78, 4, "RESERVED" },
{ 0x7c, 4, "RESERVED" },
};
int print_pmbase(struct pci_dev *sb) int print_pmbase(struct pci_dev *sb)
{ {
int i, size = 0x80; int i, size;
uint16_t pmbase; uint16_t pmbase;
const io_register_t *pm_registers;
printf("\n============= PMBASE ============\n\n"); printf("\n============= PMBASE ============\n\n");
@ -36,6 +159,13 @@ int print_pmbase(struct pci_dev *sb)
case PCI_DEVICE_ID_INTEL_ICH7DH: case PCI_DEVICE_ID_INTEL_ICH7DH:
case PCI_DEVICE_ID_INTEL_ICH7MDH: case PCI_DEVICE_ID_INTEL_ICH7MDH:
pmbase = pci_read_word(sb, 0x40) & 0xfffc; pmbase = pci_read_word(sb, 0x40) & 0xfffc;
pm_registers = ich7_pm_registers;
size = ARRAY_SIZE(ich7_pm_registers);
break;
case PCI_DEVICE_ID_INTEL_ICH8M:
pmbase = pci_read_word(sb, 0x40) & 0xfffc;
pm_registers = ich8_pm_registers;
size = ARRAY_SIZE(ich8_pm_registers);
break; break;
case 0x1234: // Dummy for non-existent functionality case 0x1234: // Dummy for non-existent functionality
printf("This southbridge does not have PMBASE.\n"); printf("This southbridge does not have PMBASE.\n");
@ -47,8 +177,27 @@ int print_pmbase(struct pci_dev *sb)
printf("PMBASE = 0x%04x (IO)\n\n", pmbase); printf("PMBASE = 0x%04x (IO)\n\n", pmbase);
for (i = 0; i < size; i += 4) { for (i = 0; i < size; i++) {
printf("pmbase+0x%04x: 0x%08x\n", i, inl(pmbase + i)); switch (pm_registers[i].size) {
case 4:
printf("pmbase+0x%04x: 0x%08x (%s)\n",
pm_registers[i].addr,
inl(pmbase+pm_registers[i].addr),
pm_registers[i].name);
break;
case 2:
printf("pmbase+0x%04x: 0x%04x (%s)\n",
pm_registers[i].addr,
inw(pmbase+pm_registers[i].addr),
pm_registers[i].name);
break;
case 1:
printf("pmbase+0x%04x: 0x%02x (%s)\n",
pm_registers[i].addr,
inb(pmbase+pm_registers[i].addr),
pm_registers[i].name);
break;
}
} }
return 0; return 0;

18
util/inteltool/rootcmplx.c
View File

@ -18,18 +18,8 @@
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/ */
#include <errno.h>
#include <fcntl.h>
#include <unistd.h>
#include <stdio.h> #include <stdio.h>
#include <string.h>
#include <stdlib.h> #include <stdlib.h>
#include <stdint.h>
#include <getopt.h>
#include <sys/mman.h>
#include <sys/io.h>
#include <pci/pci.h>
#include "inteltool.h" #include "inteltool.h"
int print_rcba(struct pci_dev *sb) int print_rcba(struct pci_dev *sb)
@ -45,6 +35,7 @@ int print_rcba(struct pci_dev *sb)
case PCI_DEVICE_ID_INTEL_ICH7M: case PCI_DEVICE_ID_INTEL_ICH7M:
case PCI_DEVICE_ID_INTEL_ICH7DH: case PCI_DEVICE_ID_INTEL_ICH7DH:
case PCI_DEVICE_ID_INTEL_ICH7MDH: case PCI_DEVICE_ID_INTEL_ICH7MDH:
case PCI_DEVICE_ID_INTEL_ICH8M:
rcba_phys = pci_read_long(sb, 0xf0) & 0xfffffffe; rcba_phys = pci_read_long(sb, 0xf0) & 0xfffffffe;
break; break;
case PCI_DEVICE_ID_INTEL_ICH: case PCI_DEVICE_ID_INTEL_ICH:
@ -58,10 +49,9 @@ int print_rcba(struct pci_dev *sb)
return 1; return 1;
} }
rcba = mmap(0, size, PROT_WRITE | PROT_READ, MAP_SHARED, rcba = map_physical(rcba_phys, size);
fd_mem, (off_t) rcba_phys);
if (rcba == MAP_FAILED) { if (rcba == NULL) {
perror("Error mapping RCBA"); perror("Error mapping RCBA");
exit(1); exit(1);
} }
@ -73,7 +63,7 @@ int print_rcba(struct pci_dev *sb)
printf("0x%04x: 0x%08x\n", i, *(uint32_t *)(rcba + i)); printf("0x%04x: 0x%08x\n", i, *(uint32_t *)(rcba + i));
} }
munmap((void *)rcba, size); unmap_physical((void *)rcba, size);
return 0; return 0;
} }