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intel/strago: Set LPC_CLKRUNB to PU_20K to solve leakage issue. 

LPC_CLKRUNB pin needs to be set to PU_20K to prevent leakage

TEST=Test on Strago and make sure the leakage is gone

Signed-off-by: Kane Chen <kane.chen@intel.com>
Change-Id: Id2bf7511806cdc52b505bb469238a9465b356352
Original-Reviewed-on: https://chromium-review.googlesource.com/317020
Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Original-Tested-by: Kane Chen <kane.chen@intel.com>
Original-Commit-Queue: Kane Chen <kane.chen@intel.com>
Signed-off-by: Hannah Williams <hannah.williams@intel.com>
Reviewed-on: https://review.coreboot.org/13175
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Kane Chen 2015-12-09 10:06:14 +08:00 committed by Martin Roth
parent 2abcffcc40
commit 116d67323b
1 changed files with 1 additions and 1 deletions
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2
src/mainboard/intel/strago/gpio.c
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@ -50,7 +50,7 @@ static const struct soc_gpio_map gpse_gpio_map[] = {
NATIVE_PU20K(1), /* 34 SDMMC3_CMD */ NATIVE_PU20K(1), /* 34 SDMMC3_CMD */
NATIVE_PU20K(1), /* 35 SDMMC3_D0 */ NATIVE_PU20K(1), /* 35 SDMMC3_D0 */
NATIVE_PU20K(1), /* 45 MF_LPC_AD2 */ NATIVE_PU20K(1), /* 45 MF_LPC_AD2 */
Native_M1, /* 46 LPC_CLKRUNB */ NATIVE_PU20K(1), /* 46 LPC_CLKRUNB */
NATIVE_PU20K(1), /* 47 MF_LPC_AD0 */ NATIVE_PU20K(1), /* 47 MF_LPC_AD0 */
Native_M1, /* 48 LPC_FRAMEB */ Native_M1, /* 48 LPC_FRAMEB */
Native_M1, /* 49 MF_LPC_CLKOUT1 */ Native_M1, /* 49 MF_LPC_CLKOUT1 */