mb/google/brya/acpi: Set power down delay to 2ms after PEXVDD
Reduce the delay between PEXVDD and NVVDD from 3ms to 2ms during power down sequences. The hardware discharge is aggressive enough that we can safely optimize this. BUG=b:288267305 TEST=build and measured delay is acceptable Signed-off-by: Tarun Tuli <taruntuli@google.com> Change-Id: I7c65301414044487e50bbbca618c4e602e571cfb Reviewed-on: https://review.coreboot.org/c/coreboot/+/76051 Reviewed-by: Nick Vaccaro <nvaccaro@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
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@ -140,7 +140,7 @@ Method (GC6I, 0, Serialized)
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#if CONFIG(BOARD_GOOGLE_AGAH)
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Sleep (10)
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#else
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Sleep (3)
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Sleep (2)
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#endif
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/* Deassert EN_PPVAR_GPU_NVVDD */
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@ -290,7 +290,7 @@ Method (PGOF, 0, Serialized)
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#if CONFIG(BOARD_GOOGLE_AGAH)
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Sleep (10)
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#else
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Sleep (3)
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Sleep (2)
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#endif
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/* Ramp down NVVDD */
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@ -61,7 +61,7 @@ static struct power_rail_sequence gpu_on_seq[] = {
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/* In GCOFF entry order (i.e., power-off order) */
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static struct power_rail_sequence gpu_off_seq[] = {
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{ "FBVDD", FBVDD_PWR_EN, false, FBVDD_PG, 0,},
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{ "PEXVDD", PEXVDD_PWR_EN, false, PEXVDD_PG, 3,},
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{ "PEXVDD", PEXVDD_PWR_EN, false, PEXVDD_PG, 2,},
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{ "NVVDD+MSVDD", NVVDD_PWR_EN, false, NVVDD_PG, 2,},
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{ "GPU 3.3V", GPU_3V3_PWR_EN, false, GPU_3V3_PG, 4,},
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{ "GPU 1.8V", GPU_1V8_PWR_EN, false, GPU_1V8_PG, 0,},
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