GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

superio/smsc/lpc47b272: Use link-time symbols over .c inclusion 

Change-Id: Id3d5f2a120c0a933c031102f206829305da20f0c
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/8081
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
This commit is contained in:
Edward O'Callaghan 2015-01-04 16:34:03 +11:00
parent c3e77fc953
commit 117849ef4d
4 changed files with 13 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/mainboard/asus/mew-vm/romstage.c
View File

@ -24,7 +24,7 @@
#include <device/pnp_def.h> #include <device/pnp_def.h>
#include <stdlib.h> #include <stdlib.h>
#include <console/console.h> #include <console/console.h>
#include "superio/smsc/lpc47b272/early_serial.c" #include <superio/smsc/lpc47b272/lpc47b272.h>
#include "northbridge/intel/i82810/raminit.h" #include "northbridge/intel/i82810/raminit.h"
#include "cpu/x86/bist.h" #include "cpu/x86/bist.h"
#include "southbridge/intel/i82801ax/i82801ax.h" #include "southbridge/intel/i82801ax/i82801ax.h"

1
src/superio/smsc/lpc47b272/Makefile.inc
View File

@ -18,4 +18,5 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
## ##
romstage-$(CONFIG_SUPERIO_SMSC_LPC47B272) += early_serial.c
ramstage-$(CONFIG_SUPERIO_SMSC_LPC47B272) += superio.c ramstage-$(CONFIG_SUPERIO_SMSC_LPC47B272) += superio.c

4
src/superio/smsc/lpc47b272/early_serial.c
View File

@ -21,6 +21,8 @@
/* Pre-RAM driver for SMSC LPC47B272 Super I/O chip. */ /* Pre-RAM driver for SMSC LPC47B272 Super I/O chip. */
#include <arch/io.h> #include <arch/io.h>
#include <device/pnp.h>
#include <stdint.h>
#include "lpc47b272.h" #include "lpc47b272.h"
static void pnp_enter_conf_state(pnp_devfn_t dev) static void pnp_enter_conf_state(pnp_devfn_t dev)
@ -42,7 +44,7 @@ static void pnp_exit_conf_state(pnp_devfn_t dev)
* @param dev High 8 bits = Super I/O port, low 8 bits = logical device number. * @param dev High 8 bits = Super I/O port, low 8 bits = logical device number.
* @param iobase Processor I/O port address to assign to this serial device. * @param iobase Processor I/O port address to assign to this serial device.
*/ */
static void lpc47b272_enable_serial(pnp_devfn_t dev, u16 iobase) void lpc47b272_enable_serial(pnp_devfn_t dev, u16 iobase)
{ {
pnp_enter_conf_state(dev); pnp_enter_conf_state(dev);
pnp_set_logical_device(dev); pnp_set_logical_device(dev);

11
src/superio/smsc/lpc47b272/lpc47b272.h
View File

@ -18,8 +18,8 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/ */
#ifndef SUPERIO_SMSC_LPC47B272_LPC47B272_H #ifndef SUPERIO_SMSC_LPC47B272_H
#define SUPERIO_SMSC_LPC47B272_LPC47B272_H #define SUPERIO_SMSC_LPC47B272_H
#define LPC47B272_FDC 0 /* Floppy */ #define LPC47B272_FDC 0 /* Floppy */
#define LPC47B272_PP 3 /* Parallel Port */ #define LPC47B272_PP 3 /* Parallel Port */
@ -30,4 +30,9 @@
#define LPC47B272_MAX_CONFIG_REGISTER 0x5F #define LPC47B272_MAX_CONFIG_REGISTER 0x5F
#endif #include <arch/io.h>
#include <stdint.h>
void lpc47b272_enable_serial(pnp_devfn_t dev, u16 iobase);
#endif /* SUPERIO_SMSC_LPC47B272_H */