superio/smsc/lpc47b272: Use link-time symbols over .c inclusion
Change-Id: Id3d5f2a120c0a933c031102f206829305da20f0c Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/8081 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
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@ -24,7 +24,7 @@
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#include <device/pnp_def.h>
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#include <stdlib.h>
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#include <console/console.h>
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#include "superio/smsc/lpc47b272/early_serial.c"
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#include <superio/smsc/lpc47b272/lpc47b272.h>
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#include "northbridge/intel/i82810/raminit.h"
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#include "cpu/x86/bist.h"
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#include "southbridge/intel/i82801ax/i82801ax.h"
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@ -18,4 +18,5 @@
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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romstage-$(CONFIG_SUPERIO_SMSC_LPC47B272) += early_serial.c
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ramstage-$(CONFIG_SUPERIO_SMSC_LPC47B272) += superio.c
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@ -21,6 +21,8 @@
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/* Pre-RAM driver for SMSC LPC47B272 Super I/O chip. */
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#include <arch/io.h>
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#include <device/pnp.h>
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#include <stdint.h>
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#include "lpc47b272.h"
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static void pnp_enter_conf_state(pnp_devfn_t dev)
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@ -42,7 +44,7 @@ static void pnp_exit_conf_state(pnp_devfn_t dev)
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* @param dev High 8 bits = Super I/O port, low 8 bits = logical device number.
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* @param iobase Processor I/O port address to assign to this serial device.
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*/
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static void lpc47b272_enable_serial(pnp_devfn_t dev, u16 iobase)
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void lpc47b272_enable_serial(pnp_devfn_t dev, u16 iobase)
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{
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pnp_enter_conf_state(dev);
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pnp_set_logical_device(dev);
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@ -18,8 +18,8 @@
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#ifndef SUPERIO_SMSC_LPC47B272_LPC47B272_H
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#define SUPERIO_SMSC_LPC47B272_LPC47B272_H
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#ifndef SUPERIO_SMSC_LPC47B272_H
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#define SUPERIO_SMSC_LPC47B272_H
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#define LPC47B272_FDC 0 /* Floppy */
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#define LPC47B272_PP 3 /* Parallel Port */
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@ -30,4 +30,9 @@
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#define LPC47B272_MAX_CONFIG_REGISTER 0x5F
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#endif
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#include <arch/io.h>
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#include <stdint.h>
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void lpc47b272_enable_serial(pnp_devfn_t dev, u16 iobase);
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#endif /* SUPERIO_SMSC_LPC47B272_H */
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