device/pci_id: Maintain consistent tab in pci_ids.h

This patch converts inconsistent white space into tab.

Change-Id: Ibc9d614eabbeb819bfff075e66b2277df4c070dc
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39672
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
This commit is contained in:
Subrata Banik 2020-03-19 22:43:01 +05:30
parent 10d522133e
commit 117ee71698
1 changed files with 177 additions and 178 deletions

View File

@ -1204,7 +1204,6 @@
#define PCI_DEVICE_ID_NVIDIA_GEFORCE3_2 0x0202 #define PCI_DEVICE_ID_NVIDIA_GEFORCE3_2 0x0202
#define PCI_DEVICE_ID_NVIDIA_QUADRO_DDC 0x0203 #define PCI_DEVICE_ID_NVIDIA_QUADRO_DDC 0x0203
#define PCI_VENDOR_ID_IMS 0x10e0 #define PCI_VENDOR_ID_IMS 0x10e0
#define PCI_DEVICE_ID_IMS_8849 0x8849 #define PCI_DEVICE_ID_IMS_8849 0x8849
#define PCI_DEVICE_ID_IMS_TT128 0x9128 #define PCI_DEVICE_ID_IMS_TT128 0x9128
@ -3425,10 +3424,10 @@
#define PCI_DEVICE_ID_INTEL_CML_GT2_S_P0 0x9BC5 #define PCI_DEVICE_ID_INTEL_CML_GT2_S_P0 0x9BC5
#define PCI_DEVICE_ID_INTEL_CML_GT2_H_R0 0x3E9B #define PCI_DEVICE_ID_INTEL_CML_GT2_H_R0 0x3E9B
#define PCI_DEVICE_ID_INTEL_CML_GT2_H_R1 0x9BC4 #define PCI_DEVICE_ID_INTEL_CML_GT2_H_R1 0x9BC4
#define PCI_DEVICE_ID_INTEL_TGL_GT1 0X9A60 #define PCI_DEVICE_ID_INTEL_TGL_GT1 0x9A60
#define PCI_DEVICE_ID_INTEL_TGL_GT2_UY 0X9A49 #define PCI_DEVICE_ID_INTEL_TGL_GT2_UY 0x9A49
#define PCI_DEVICE_ID_INTEL_TGL_GT2 0XFF20 #define PCI_DEVICE_ID_INTEL_TGL_GT2 0xFF20
#define PCI_DEVICE_ID_INTEL_TGL_GT2_Y 0X9A40 #define PCI_DEVICE_ID_INTEL_TGL_GT2_Y 0x9A40
#define PCI_DEVICE_ID_INTEL_TGL_GT0 0x9A7F #define PCI_DEVICE_ID_INTEL_TGL_GT0 0x9A7F
#define PCI_DEVICE_ID_INTEL_TGL_GT2_ULT 0x9A49 #define PCI_DEVICE_ID_INTEL_TGL_GT2_ULT 0x9A49
#define PCI_DEVICE_ID_INTEL_TGL_GT3_ULT 0x9A52 #define PCI_DEVICE_ID_INTEL_TGL_GT3_ULT 0x9A52