ipq8064: Add work around for slow timer clock
Libpayload libc requires timer clock frequency to be at least 1MHz. Ipq8064 code presently provides a single option of 32kHz. Pretend to be running at 1 MHz without additional accuracy. This is a hack which will be reverted as soon as the SOC is configured to supply a faster running clock. BUG=chrome-os-partner:27784, chrome-os-partner:28880 TEST=with other changes depthcharge boots to the CLI console Original-Change-Id: I80ec6652bc5693a549668cd6e824e9cf5c26b182 Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/201342 Original-Reviewed-by: David Hendricks <dhendrix@chromium.org> (cherry picked from commit 466a59967b13986099106f8b44924648c1e6e6cd) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: I113689191db70710e7a45ccd02d672f482343e35 Reviewed-on: http://review.coreboot.org/8004 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins)
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@ -29,13 +29,31 @@
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#include <libpayload.h>
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/*
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* TODO(vbendeb): reverted this hack once proper timer code is in place (see
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* http://crosbug.com/p/28880 for details.
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*/
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#define MIN_TIMER_FREQ 1000000
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uint64_t timer_hz(void)
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{
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return CONFIG_LP_IPQ806X_TIMER_FREQ;
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return (CONFIG_LP_IPQ806X_TIMER_FREQ >= MIN_TIMER_FREQ) ?
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CONFIG_LP_IPQ806X_TIMER_FREQ : MIN_TIMER_FREQ;
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}
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uint64_t timer_raw_value(void)
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{
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return readl((void *)CONFIG_LP_IPQ806X_TIMER_REG);
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uint64_t rawv = readl((void *)CONFIG_LP_IPQ806X_TIMER_REG);
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/*
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* This is extremely crude, but it kicks in only for the case when the
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* timer clock frequency is below 1MHz, which should never be the case
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* on a properly configured system. The compiler will eliminate the
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* check as long as config value exceeds 1MHz.
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*/
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if (CONFIG_LP_IPQ806X_TIMER_FREQ < MIN_TIMER_FREQ)
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rawv *= (MIN_TIMER_FREQ / CONFIG_LP_IPQ806X_TIMER_FREQ);
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return rawv;
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}
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